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author | Tom Rini <trini@ti.com> | 2015-01-26 17:44:49 -0500 |
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committer | Tom Rini <trini@ti.com> | 2015-01-26 17:44:49 -0500 |
commit | ab92da9f47d51d363c7de42e2a7bd807e2c1bd54 (patch) | |
tree | dfabc29929e39a1ecc47edf5a4cf839ead062acd /arch/x86/include/asm/arch-ivybridge | |
parent | aed03faa064cca56847571b13cbd4c849c6116aa (diff) | |
parent | e43ade3749ff10bc313f33bf23705465e4163896 (diff) | |
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Merge branch 'master' of git://git.denx.de/u-boot-x86
Diffstat (limited to 'arch/x86/include/asm/arch-ivybridge')
-rw-r--r-- | arch/x86/include/asm/arch-ivybridge/mrccache.h | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/x86/include/asm/arch-ivybridge/mrccache.h b/arch/x86/include/asm/arch-ivybridge/mrccache.h new file mode 100644 index 0000000..968b2ef --- /dev/null +++ b/arch/x86/include/asm/arch-ivybridge/mrccache.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_ARCH_MRCCACHE_H +#define _ASM_ARCH_MRCCACHE_H + +#define MRC_DATA_ALIGN 0x1000 +#define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | ('C' << 16) | \ + ('D'<<24)) + +__packed struct mrc_data_container { + u32 signature; /* "MRCD" */ + u32 data_size; /* Size of the 'data' field */ + u32 checksum; /* IP style checksum */ + u32 reserved; /* For header alignment */ + u8 data[0]; /* Variable size, platform/run time dependent */ +}; + +struct fmap_entry; +struct spi_flash; + +/** + * mrccache_find_current() - find the latest MRC cache record + * + * This searches the MRC cache region looking for the latest record to use + * for setting up SDRAM + * + * @entry: Information about the position and size of the MRC cache + * @return pointer to latest record, or NULL if none + */ +struct mrc_data_container *mrccache_find_current(struct fmap_entry *entry); + +/** + * mrccache_update() - update the MRC cache with a new record + * + * This writes a new record to the end of the MRC cache. If the new record is + * the same as the latest record then the write is skipped + * + * @sf: SPI flash to write to + * @entry: Position and size of MRC cache in SPI flash + * @cur: Record to write + * @return 0 if updated, -EEXIST if the record is the same as the latest + * record, other error if SPI write failed + */ +int mrccache_update(struct spi_flash *sf, struct fmap_entry *entry, + struct mrc_data_container *cur); + +#endif |