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author | Bin Meng <bmeng.cn@gmail.com> | 2016-05-07 07:46:31 -0700 |
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committer | Bin Meng <bmeng.cn@gmail.com> | 2016-05-23 15:18:00 +0800 |
commit | 42f8ebfd23a525c24011830b0d221c8d8cbcc5c9 (patch) | |
tree | ee376a3a2f542c51a73ad09b653b9178d7fe9e89 /arch/x86/include/asm/arch-baytrail/acpi/xhci.asl | |
parent | fc4f5cccd87abf4c72b13f64b49719fde9107cad (diff) | |
download | u-boot-imx-42f8ebfd23a525c24011830b0d221c8d8cbcc5c9.zip u-boot-imx-42f8ebfd23a525c24011830b0d221c8d8cbcc5c9.tar.gz u-boot-imx-42f8ebfd23a525c24011830b0d221c8d8cbcc5c9.tar.bz2 |
x86: baytrail: Add platform ASL files
This adds basic BayTrail platform ASL files. They are intended to be
included in dsdt.asl of any board that is based on this platform.
Note: ACPI mode support for GPIO/LPSS/SCC/LPE are not supported for
now. They will be added in the future.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/arch-baytrail/acpi/xhci.asl')
-rw-r--r-- | arch/x86/include/asm/arch-baytrail/acpi/xhci.asl | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/xhci.asl b/arch/x86/include/asm/arch-baytrail/acpi/xhci.asl new file mode 100644 index 0000000..a5a4404 --- /dev/null +++ b/arch/x86/include/asm/arch-baytrail/acpi/xhci.asl @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2014 Google Inc. + * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com> + * + * Modified from coreboot src/soc/intel/baytrail/acpi/xhci.asl + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* XHCI Controller 0:14.0 */ + +Device (XHCI) +{ + Name(_ADR, 0x00140000) + + /* Power Resources for Wake */ + Name(_PRW, Package() { 13, 3 }) + + /* Highest D state in S3 state */ + Name(_S3D, 3) + + Device (RHUB) + { + Name(_ADR, 0x00000000) + + Device (PRT1) { Name(_ADR, 1) } /* USB Port 0 */ + Device (PRT2) { Name(_ADR, 2) } /* USB Port 1 */ + Device (PRT3) { Name(_ADR, 3) } /* USB Port 2 */ + Device (PRT4) { Name(_ADR, 4) } /* USB Port 3 */ + } +} |