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| author | Bin Meng <bmeng.cn@gmail.com> | 2016-05-07 07:46:31 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-05-23 15:18:00 +0800 |
| commit | 42f8ebfd23a525c24011830b0d221c8d8cbcc5c9 (patch) | |
| tree | ee376a3a2f542c51a73ad09b653b9178d7fe9e89 /arch/x86/include/asm/arch-baytrail/acpi/irqroute.h | |
| parent | fc4f5cccd87abf4c72b13f64b49719fde9107cad (diff) | |
| download | u-boot-imx-42f8ebfd23a525c24011830b0d221c8d8cbcc5c9.zip u-boot-imx-42f8ebfd23a525c24011830b0d221c8d8cbcc5c9.tar.gz u-boot-imx-42f8ebfd23a525c24011830b0d221c8d8cbcc5c9.tar.bz2 | |
x86: baytrail: Add platform ASL files
This adds basic BayTrail platform ASL files. They are intended to be
included in dsdt.asl of any board that is based on this platform.
Note: ACPI mode support for GPIO/LPSS/SCC/LPE are not supported for
now. They will be added in the future.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/include/asm/arch-baytrail/acpi/irqroute.h')
| -rw-r--r-- | arch/x86/include/asm/arch-baytrail/acpi/irqroute.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/irqroute.h b/arch/x86/include/asm/arch-baytrail/acpi/irqroute.h new file mode 100644 index 0000000..d746314 --- /dev/null +++ b/arch/x86/include/asm/arch-baytrail/acpi/irqroute.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/arch/device.h> + +#define PCI_DEV_PIRQ_ROUTES \ + PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(EMMC_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(SDIO_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(SD_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(SATA_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(XHCI_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(LPE_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(MMC45_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(SIO1_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(TXE_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(HDA_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(PCIE_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(EHCI_DEV, A, A, A, A), \ + PCI_DEV_PIRQ_ROUTE(SIO2_DEV, A, B, C, D), \ + PCI_DEV_PIRQ_ROUTE(PCU_DEV, A, B, C, D) + +#define PCIE_BRIDGE_IRQ_ROUTES \ + PCIE_BRIDGE_DEV(RP, PCIE_DEV, A, B, C, D) |