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author | Simon Glass <sjg@chromium.org> | 2012-12-03 13:56:51 +0000 |
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committer | Simon Glass <sjg@chromium.org> | 2012-12-06 14:30:42 -0800 |
commit | 2712f08898de84a9688b4a7b7752ba27e71d63ef (patch) | |
tree | 98c4ce6b46df8731581cbdfc2dafa99bfbfa1096 /arch/x86/dts | |
parent | ba74a0ffcb2f1fb2e5a03ca4f2ee7e07c4ebb6fd (diff) | |
download | u-boot-imx-2712f08898de84a9688b4a7b7752ba27e71d63ef.zip u-boot-imx-2712f08898de84a9688b4a7b7752ba27e71d63ef.tar.gz u-boot-imx-2712f08898de84a9688b4a7b7752ba27e71d63ef.tar.bz2 |
x86: fdt: Create basic .dtsi file for coreboot
This contains just the minimum information for a coreboot-based board.
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/dts')
-rw-r--r-- | arch/x86/dts/coreboot.dtsi | 16 | ||||
-rw-r--r-- | arch/x86/dts/skeleton.dtsi | 13 |
2 files changed, 29 insertions, 0 deletions
diff --git a/arch/x86/dts/coreboot.dtsi b/arch/x86/dts/coreboot.dtsi new file mode 100644 index 0000000..4862a59 --- /dev/null +++ b/arch/x86/dts/coreboot.dtsi @@ -0,0 +1,16 @@ +/include/ "skeleton.dtsi" + +/ { + aliases { + console = "/serial"; + }; + + serial { + compatible = "ns16550"; + reg-shift = <1>; + io-mapped = <1>; + multiplier = <1>; + baudrate = <115200>; + status = "disabled"; + }; +}; diff --git a/arch/x86/dts/skeleton.dtsi b/arch/x86/dts/skeleton.dtsi new file mode 100644 index 0000000..b41d241 --- /dev/null +++ b/arch/x86/dts/skeleton.dtsi @@ -0,0 +1,13 @@ +/* + * Skeleton device tree; the bare minimum needed to boot; just include and + * add a compatible value. The bootloader will typically populate the memory + * node. + */ + +/ { + #address-cells = <1>; + #size-cells = <1>; + chosen { }; + aliases { }; + memory { device_type = "memory"; reg = <0 0>; }; +}; |