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| author | Simon Glass <sjg@chromium.org> | 2015-03-05 12:25:31 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-04-18 11:11:09 -0600 |
| commit | a219daeafef4df1b219db68c80116d82113c82b2 (patch) | |
| tree | c6e22aaa30e02a998a34df18bcf8529321fe062d /arch/x86/cpu | |
| parent | a33aca10ac962ef54e2c9abbcc17c532f046bd74 (diff) | |
| download | u-boot-imx-a219daeafef4df1b219db68c80116d82113c82b2.zip u-boot-imx-a219daeafef4df1b219db68c80116d82113c82b2.tar.gz u-boot-imx-a219daeafef4df1b219db68c80116d82113c82b2.tar.bz2 | |
dm: x86: pci: Add a PCI driver for driver model
Add a simple x86 PCI driver which uses standard functions provided by the
architecture.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu')
| -rw-r--r-- | arch/x86/cpu/pci.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c index c6c5267..e23b233 100644 --- a/arch/x86/cpu/pci.c +++ b/arch/x86/cpu/pci.c @@ -10,9 +10,11 @@ */ #include <common.h> +#include <dm.h> #include <errno.h> #include <malloc.h> #include <pci.h> +#include <asm/io.h> #include <asm/pci.h> DECLARE_GLOBAL_DATA_PTR; @@ -111,3 +113,41 @@ void x86_pci_write_config32(pci_dev_t dev, unsigned where, unsigned value) { pci_hose_write_config_dword(get_hose(), dev, where, value); } + +int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, + ulong *valuep, enum pci_size_t size) +{ + outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); + switch (size) { + case PCI_SIZE_8: + *valuep = inb(PCI_REG_DATA + (offset & 3)); + break; + case PCI_SIZE_16: + *valuep = inw(PCI_REG_DATA + (offset & 2)); + break; + case PCI_SIZE_32: + *valuep = inl(PCI_REG_DATA); + break; + } + + return 0; +} + +int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, + ulong value, enum pci_size_t size) +{ + outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); + switch (size) { + case PCI_SIZE_8: + outb(value, PCI_REG_DATA + (offset & 3)); + break; + case PCI_SIZE_16: + outw(value, PCI_REG_DATA + (offset & 2)); + break; + case PCI_SIZE_32: + outl(value, PCI_REG_DATA); + break; + } + + return 0; +} |