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author | Simon Glass <sjg@chromium.org> | 2015-10-18 19:51:27 -0600 |
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committer | Simon Glass <sjg@chromium.org> | 2015-10-21 07:46:50 -0600 |
commit | 7b95252d82267143e647d5fee96c7d9d5bf74560 (patch) | |
tree | ec92539c590c51b03aa04ef7ff0a7ef439226e1f /arch/x86/cpu | |
parent | 60994a02a56fd7dc408b0a36ad5dead1b85959b4 (diff) | |
download | u-boot-imx-7b95252d82267143e647d5fee96c7d9d5bf74560.zip u-boot-imx-7b95252d82267143e647d5fee96c7d9d5bf74560.tar.gz u-boot-imx-7b95252d82267143e647d5fee96c7d9d5bf74560.tar.bz2 |
x86: chromebook_link: Enable the debug UART
Add support for the debug UART on link. This is useful for early debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu')
-rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index cce5923..0e6512c 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -340,3 +340,10 @@ int print_cpuinfo(void) return 0; } + +void board_debug_uart_init(void) +{ + /* This enables the debug UART */ + pci_x86_write_config(NULL, PCH_LPC_DEV, LPC_EN, COMA_LPC_EN, + PCI_SIZE_16); +} |