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authorBin Meng <bmeng.cn@gmail.com>2014-12-12 21:05:28 +0800
committerSimon Glass <sjg@chromium.org>2014-12-13 22:32:05 -0700
commit752a0b085b0c595a5979f1bee89961cffd109461 (patch)
treeb64e39276d580117538202f83de151384140597f /arch/x86/cpu
parent7e7740397dc9405a8ed6299e8ebc8170142ccae7 (diff)
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x86: Initial import from Intel FSP release for Queensbay platform
This is the initial import from Intel FSP release for Queensbay platform (Tunnel Creek processor and Topcliff Platform Controller Hub), which can be downloaded from Intel website. For more details, check http://www.intel.com/fsp. Note: U-Boot coding convention was applied to these codes, so it looks completely different from the original Intel release. Also update FSP support codes license header to use SPDX ID. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu')
-rw-r--r--arch/x86/cpu/queensbay/fsp_configs.c21
-rw-r--r--arch/x86/cpu/queensbay/fsp_support.c405
2 files changed, 426 insertions, 0 deletions
diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c
new file mode 100644
index 0000000..a7bb314
--- /dev/null
+++ b/arch/x86/cpu/queensbay/fsp_configs.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: Intel
+ */
+
+#include <types.h>
+#include <string.h>
+#include "fsp_support.h"
+
+void update_fsp_upd(struct upd_region_t *fsp_upd)
+{
+ /* Override any UPD setting if required */
+
+ /* Uncomment the line below to enable DEBUG message */
+ /* fsp_upd->serial_dbgport_type = 1; */
+
+ /* Examples on how to initialize the pointers in UPD region */
+ /* fsp_upd->pcd_example = (EXAMPLE_DATA *)&example; */
+}
diff --git a/arch/x86/cpu/queensbay/fsp_support.c b/arch/x86/cpu/queensbay/fsp_support.c
new file mode 100644
index 0000000..2048030
--- /dev/null
+++ b/arch/x86/cpu/queensbay/fsp_support.c
@@ -0,0 +1,405 @@
+/*
+ * Copyright (C) 2013, Intel Corporation
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: Intel
+ */
+
+#include <types.h>
+#include <string.h>
+#include "fsp_support.h"
+
+/**
+ * Reads a 64-bit value from memory that may be unaligned.
+ *
+ * This function returns the 64-bit value pointed to by buf. The function
+ * guarantees that the read operation does not produce an alignment fault.
+ *
+ * If the buf is NULL, then ASSERT().
+ *
+ * @buf: Pointer to a 64-bit value that may be unaligned.
+ *
+ * @return: The 64-bit value read from buf.
+ */
+static u64 read_unaligned64(const u64 *buf)
+{
+ ASSERT(buf != NULL);
+
+ return *buf;
+}
+
+/**
+ * Compares two GUIDs
+ *
+ * If the GUIDs are identical then TRUE is returned.
+ * If there are any bit differences in the two GUIDs, then FALSE is returned.
+ *
+ * If guid1 is NULL, then ASSERT().
+ * If guid2 is NULL, then ASSERT().
+ *
+ * @guid1: A pointer to a 128 bit GUID.
+ * @guid2: A pointer to a 128 bit GUID.
+ *
+ * @retval TRUE: guid1 and guid2 are identical.
+ * @retval FALSE: guid1 and guid2 are not identical.
+ */
+static unsigned char compare_guid(const struct efi_guid_t *guid1,
+ const struct efi_guid_t *guid2)
+{
+ u64 guid1_low;
+ u64 guid2_low;
+ u64 guid1_high;
+ u64 guid2_high;
+
+ guid1_low = read_unaligned64((const u64 *)guid1);
+ guid2_low = read_unaligned64((const u64 *)guid2);
+ guid1_high = read_unaligned64((const u64 *)guid1 + 1);
+ guid2_high = read_unaligned64((const u64 *)guid2 + 1);
+
+ return (unsigned char)(guid1_low == guid2_low && guid1_high == guid2_high);
+}
+
+u32 __attribute__((optimize("O0"))) find_fsp_header(void)
+{
+ volatile register u8 *fsp asm("eax");
+
+ /* Initalize the FSP base */
+ fsp = (u8 *)CONFIG_FSP_LOCATION;
+
+ /* Check the FV signature, _FVH */
+ if (((struct fv_header_t *)fsp)->sign == 0x4856465F) {
+ /* Go to the end of the FV header and align the address */
+ fsp += ((struct fv_header_t *)fsp)->ext_hdr_off;
+ fsp += ((struct fv_ext_header_t *)fsp)->ext_hdr_size;
+ fsp = (u8 *)(((u32)fsp + 7) & 0xFFFFFFF8);
+ } else {
+ fsp = 0;
+ }
+
+ /* Check the FFS GUID */
+ if (fsp &&
+ (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[0] == 0x912740BE) &&
+ (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[1] == 0x47342284) &&
+ (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[2] == 0xB08471B9) &&
+ (((u32 *)&(((struct ffs_file_header_t *)fsp)->name))[3] == 0x0C3F3527)) {
+ /* Add the FFS header size to find the raw section header */
+ fsp += sizeof(struct ffs_file_header_t);
+ } else {
+ fsp = 0;
+ }
+
+ if (fsp &&
+ ((struct raw_section_t *)fsp)->type == EFI_SECTION_RAW) {
+ /* Add the raw section header size to find the FSP header */
+ fsp += sizeof(struct raw_section_t);
+ } else {
+ fsp = 0;
+ }
+
+ return (u32)fsp;
+}
+
+#ifdef __PRE_RAM__
+void fsp_continue(struct shared_data_t *shared_data, u32 status, void *hob_list)
+{
+ u32 stack_len;
+ u32 stack_base;
+ u32 stack_top;
+
+ ASSERT(status == 0);
+
+ /* Get the migrated stack in normal memory */
+ stack_base = (u32)get_bootloader_tmp_mem(hob_list, &stack_len);
+ ASSERT(stack_base != 0);
+ stack_top = stack_base + stack_len - sizeof(u32);
+
+ /*
+ * Old stack base is stored at the very end of the stack top,
+ * use it to calculate the migrated shared data base
+ */
+ shared_data = (struct shared_data_t *)(stack_base +
+ ((u32)shared_data - *(u32 *)stack_top));
+
+ /* The boot loader main function entry */
+ bl_main_continue(hob_list, shared_data);
+}
+
+void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)
+{
+ struct shared_data_t shared_data;
+ fsp_init_f init;
+ struct fsp_init_params_t params;
+ struct fspinit_rtbuf_t rt_buf;
+ struct vpd_region_t *fsp_vpd;
+ struct fsp_header_t *fsp_hdr;
+ struct fsp_init_params_t *params_ptr;
+ struct upd_region_t *fsp_upd;
+
+ fsp_hdr = (struct fsp_header_t *)find_fsp_header();
+ if (fsp_hdr == NULL) {
+ /* No valid FSP info header was found */
+ ASSERT(FALSE);
+ }
+
+ fsp_upd = (struct upd_region_t *)&shared_data.fsp_upd;
+ memset((void *)&rt_buf, 0, sizeof(struct fspinit_rtbuf_t));
+
+ /* Reserve a gap in stack top */
+ rt_buf.common.stack_top = (u32 *)stack_top - 32;
+ rt_buf.common.boot_mode = boot_mode;
+ rt_buf.common.upd_data = (struct upd_region_t *)fsp_upd;
+
+ /* Get VPD region start */
+ fsp_vpd = (struct vpd_region_t *)(fsp_hdr->img_base +
+ fsp_hdr->cfg_region_off);
+
+ /* Verifify the VPD data region is valid */
+ ASSERT((fsp_vpd->img_rev == VPD_IMAGE_REV) &&
+ (fsp_vpd->sign == VPD_IMAGE_ID));
+
+ /* Copy default data from Flash */
+ memcpy(fsp_upd, (void *)(fsp_hdr->img_base + fsp_vpd->upd_offset),
+ sizeof(struct upd_region_t));
+
+ /* Verifify the UPD data region is valid */
+ ASSERT(fsp_upd->terminator == 0x55AA);
+
+ /* Override any UPD setting if required */
+ update_fsp_upd(fsp_upd);
+
+ memset((void *)&params, 0, sizeof(struct fsp_init_params_t));
+ params.nvs_buf = nvs_buf;
+ params.rt_buf = (struct fspinit_rtbuf_t *)&rt_buf;
+ params.continuation = (fsp_continuation_f)asm_continuation;
+
+ init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init);
+ params_ptr = &params;
+
+ shared_data.fsp_hdr = fsp_hdr;
+ shared_data.stack_top = (u32 *)stack_top;
+
+ /*
+ * Use ASM code to ensure the register value in EAX & ECX
+ * will be passed into BlContinuationFunc
+ */
+ asm volatile (
+ "pushl %0;"
+ "call *%%eax;"
+ ".global asm_continuation;"
+ "asm_continuation:;"
+ "popl %%eax;" /* pop out return address */
+ "pushl %%ecx;" /* push shared_data pointer */
+ "pushl %%eax;" /* push back return address */
+ "jmp fsp_continue;"
+ : : "m"(params_ptr), "a"(init), "c"(&shared_data)
+ );
+
+ /*
+ * Should never get here.
+ * Control will continue from romstage_main_continue_asm.
+ * This line below is to prevent the compiler from optimizing
+ * structure intialization.
+ */
+ init(&params);
+
+ /*
+ * Should never return.
+ * Control will continue from ContinuationFunc
+ */
+ ASSERT(FALSE);
+}
+
+#else
+
+u32 fsp_notify(struct fsp_header_t *fsp_hdr, u32 phase)
+{
+ fsp_notify_f notify;
+ struct fsp_notify_params_t params;
+ u32 status;
+
+ if (!fsp_hdr)
+ fsp_hdr = (struct fsp_header_t *)find_fsp_header();
+
+ if (fsp_hdr == NULL) {
+ /* No valid FSP info header */
+ ASSERT(FALSE);
+ }
+
+ notify = (fsp_notify_f)(fsp_hdr->img_base + fsp_hdr->fsp_notify);
+ params.phase = phase;
+ status = notify(&params);
+
+ return status;
+}
+
+#endif /* __PRE_RAM__ */
+
+u32 get_usable_lowmem_top(const void *hob_list)
+{
+ union hob_pointers_t hob;
+ phys_addr_t phys_start;
+ u32 top;
+
+ /* Get the HOB list for processing */
+ hob.raw = (void *)hob_list;
+
+ /* * Collect memory ranges */
+ top = 0x100000;
+ while (!END_OF_HOB(hob)) {
+ if (hob.hdr->type == HOB_TYPE_RES_DESC) {
+ if (hob.res_desc->type == RES_SYS_MEM) {
+ phys_start = hob.res_desc->phys_start;
+ /* Need memory above 1MB to be collected here */
+ if (phys_start >= 0x100000 &&
+ phys_start < (phys_addr_t)0x100000000)
+ top += (u32)(hob.res_desc->len);
+ }
+ }
+ hob.raw = GET_NEXT_HOB(hob);
+ }
+
+ return top;
+}
+
+u64 get_usable_highmem_top(const void *hob_list)
+{
+ union hob_pointers_t hob;
+ phys_addr_t phys_start;
+ u64 top;
+
+ /* Get the HOB list for processing */
+ hob.raw = (void *)hob_list;
+
+ /* Collect memory ranges */
+ top = 0x100000000;
+ while (!END_OF_HOB(hob)) {
+ if (hob.hdr->type == HOB_TYPE_RES_DESC) {
+ if (hob.res_desc->type == RES_SYS_MEM) {
+ phys_start = hob.res_desc->phys_start;
+ /* Need memory above 1MB to be collected here */
+ if (phys_start >= (phys_addr_t)0x100000000)
+ top += (u32)(hob.res_desc->len);
+ }
+ }
+ hob.raw = GET_NEXT_HOB(hob);
+ }
+
+ return top;
+}
+
+u64 get_fsp_reserved_mem_from_guid(const void *hob_list, u64 *len,
+ struct efi_guid_t *guid)
+{
+ union hob_pointers_t hob;
+
+ /* Get the HOB list for processing */
+ hob.raw = (void *)hob_list;
+
+ /* Collect memory ranges */
+ while (!END_OF_HOB(hob)) {
+ if (hob.hdr->type == HOB_TYPE_RES_DESC) {
+ if (hob.res_desc->type == RES_MEM_RESERVED) {
+ if (compare_guid(&hob.res_desc->owner, guid)) {
+ if (len)
+ *len = (u32)(hob.res_desc->len);
+
+ return (u64)(hob.res_desc->phys_start);
+ }
+ }
+ }
+ hob.raw = GET_NEXT_HOB(hob);
+ }
+
+ return 0;
+}
+
+u32 get_fsp_reserved_mem(const void *hob_list, u32 *len)
+{
+ const struct efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
+ u64 length;
+ u32 base;
+
+ base = (u32)get_fsp_reserved_mem_from_guid(hob_list,
+ &length, (struct efi_guid_t *)&guid);
+ if ((len != 0) && (base != 0))
+ *len = (u32)length;
+
+ return base;
+}
+
+u32 get_tseg_reserved_mem(const void *hob_list, u32 *len)
+{
+ const struct efi_guid_t guid = FSP_HOB_RESOURCE_OWNER_TSEG_GUID;
+ u64 length;
+ u32 base;
+
+ base = (u32)get_fsp_reserved_mem_from_guid(hob_list,
+ &length, (struct efi_guid_t *)&guid);
+ if ((len != 0) && (base != 0))
+ *len = (u32)length;
+
+ return base;
+}
+
+void *get_next_hob(u16 type, const void *hob_list)
+{
+ union hob_pointers_t hob;
+
+ ASSERT(hob_list != NULL);
+
+ hob.raw = (u8 *)hob_list;
+
+ /* Parse the HOB list until end of list or matching type is found */
+ while (!END_OF_HOB(hob)) {
+ if (hob.hdr->type == type)
+ return hob.raw;
+
+ hob.raw = GET_NEXT_HOB(hob);
+ }
+
+ return NULL;
+}
+
+void *get_next_guid_hob(const struct efi_guid_t *guid, const void *hob_list)
+{
+ union hob_pointers_t hob;
+
+ hob.raw = (u8 *)hob_list;
+ while ((hob.raw = get_next_hob(HOB_TYPE_GUID_EXT,
+ hob.raw)) != NULL) {
+ if (compare_guid(guid, &hob.guid->name))
+ break;
+ hob.raw = GET_NEXT_HOB(hob);
+ }
+
+ return hob.raw;
+}
+
+void *get_guid_hob_data(const void *hob_list, u32 *len, struct efi_guid_t *guid)
+{
+ u8 *guid_hob;
+
+ guid_hob = get_next_guid_hob(guid, hob_list);
+ if (guid_hob == NULL) {
+ return NULL;
+ } else {
+ if (len)
+ *len = GET_GUID_HOB_DATA_SIZE(guid_hob);
+
+ return GET_GUID_HOB_DATA(guid_hob);
+ }
+}
+
+void *get_fsp_nvs_data(const void *hob_list, u32 *len)
+{
+ const struct efi_guid_t guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
+
+ return get_guid_hob_data(hob_list, len, (struct efi_guid_t *)&guid);
+}
+
+void *get_bootloader_tmp_mem(const void *hob_list, u32 *len)
+{
+ const struct efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID;
+
+ return get_guid_hob_data(hob_list, len, (struct efi_guid_t *)&guid);
+}