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author | Bin Meng <bmeng.cn@gmail.com> | 2015-05-25 22:36:26 +0800 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2015-06-04 02:39:39 -0600 |
commit | 0fcb7acf6748d2ee0b7abfd75e074840be6b7e0e (patch) | |
tree | 665c64676564c76a278dca6464b410c5822a5dd4 /arch/x86/cpu/qemu/pci.c | |
parent | cc7debc7199b3c637ceead92bc103aeb6eb10a38 (diff) | |
download | u-boot-imx-0fcb7acf6748d2ee0b7abfd75e074840be6b7e0e.zip u-boot-imx-0fcb7acf6748d2ee0b7abfd75e074840be6b7e0e.tar.gz u-boot-imx-0fcb7acf6748d2ee0b7abfd75e074840be6b7e0e.tar.bz2 |
x86: qemu: Enable legacy IDE I/O ports decode
QEMU always decode legacy IDE I/O ports on PIIX chipset. However Linux ata_piix
driver does sanity check to see whether legacy ports decode is turned on.
To make Linux ata_piix driver happy, turn on the decode via IDE_TIMING register.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/qemu/pci.c')
-rw-r--r-- | arch/x86/cpu/qemu/pci.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/x86/cpu/qemu/pci.c b/arch/x86/cpu/qemu/pci.c index 2f4ba17..467d51d 100644 --- a/arch/x86/cpu/qemu/pci.c +++ b/arch/x86/cpu/qemu/pci.c @@ -8,6 +8,7 @@ #include <pci.h> #include <pci_rom.h> #include <asm/pci.h> +#include <asm/arch/device.h> #include <asm/arch/qemu.h> DECLARE_GLOBAL_DATA_PTR; @@ -87,5 +88,18 @@ int board_pci_post_scan(struct pci_controller *hose) for (i = 0; i < PAM_NUM; i++) x86_pci_write_config8(PCI_BDF(0, 0, 0), pam + i, PAM_RW); + if (device == PCI_DEVICE_ID_INTEL_82441) { + /* + * Enable legacy IDE I/O ports decode + * + * Note: QEMU always decode legacy IDE I/O port on PIIX chipset. + * However Linux ata_piix driver does sanity check on these two + * registers to see whether legacy ports decode is turned on. + * This is to make Linux ata_piix driver happy. + */ + x86_pci_write_config16(PIIX_IDE, IDE0_TIM, IDE_DECODE_EN); + x86_pci_write_config16(PIIX_IDE, IDE1_TIM, IDE_DECODE_EN); + } + return ret; } |