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| author | Simon Glass <sjg@chromium.org> | 2014-11-12 22:42:10 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-21 07:34:11 +0100 |
| commit | 70a09c6c3dc25b200a9d0475afcf5dfc9836b18e (patch) | |
| tree | 8b4433ebbbbd7e558b4a291cb2ccd2aec14ab710 /arch/x86/cpu/ivybridge/cpu.c | |
| parent | d1cd045982b1e1e4db2c1cc2b2b932f739b78a11 (diff) | |
| download | u-boot-imx-70a09c6c3dc25b200a9d0475afcf5dfc9836b18e.zip u-boot-imx-70a09c6c3dc25b200a9d0475afcf5dfc9836b18e.tar.gz u-boot-imx-70a09c6c3dc25b200a9d0475afcf5dfc9836b18e.tar.bz2 | |
x86: chromebook_link: Implement CAR support (cache as RAM)
Add support for CAR so that we have memory to use prior to DRAM init.
On link there is a total of 128KB of CAR available, although some is
used for the memory reference code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/ivybridge/cpu.c')
| -rw-r--r-- | arch/x86/cpu/ivybridge/cpu.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index 1cbdaaf..5863811 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -12,6 +12,7 @@ #include <common.h> #include <asm/cpu.h> +#include <asm/post.h> #include <asm/processor.h> DECLARE_GLOBAL_DATA_PTR; @@ -20,6 +21,7 @@ int arch_cpu_init(void) { int ret; + post_code(POST_CPU_INIT); timer_set_base(rdtsc()); ret = x86_cpu_init_f(); |