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authorSimon Glass <sjg@chromium.org>2015-01-19 22:16:13 -0700
committerSimon Glass <sjg@chromium.org>2015-01-24 06:13:45 -0700
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x86: dts: Add SPI flash MRC details for chromebook_link
Correct the SPI flash compatible string, add an alias and specify the position of the MRC cache, used to store SDRAM training settings for the Memory Reference Code. Signed-off-by: Simon Glass <sjg@chromium.org>
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