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| author | Bin Meng <bmeng.cn@gmail.com> | 2016-02-01 01:40:52 -0800 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2016-02-05 12:47:22 +0800 |
| commit | 248c4faa9f0499971dadf148e666b087384117f0 (patch) | |
| tree | 3a65f3a2c335cd186828689b8c5abd4c3b784239 /arch/x86/cpu/irq.c | |
| parent | b46c2088da17b8f9210bf0860af88ec533435af9 (diff) | |
| download | u-boot-imx-248c4faa9f0499971dadf148e666b087384117f0.zip u-boot-imx-248c4faa9f0499971dadf148e666b087384117f0.tar.gz u-boot-imx-248c4faa9f0499971dadf148e666b087384117f0.tar.bz2 | |
x86: irq: Convert to use DM PCI API
Now that we have irq router's udevice passed as a parameter, it's
time to start using the DM PCI API instead of those legacy ones.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/irq.c')
| -rw-r--r-- | arch/x86/cpu/irq.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c index fea6f65..2950783 100644 --- a/arch/x86/cpu/irq.c +++ b/arch/x86/cpu/irq.c @@ -25,7 +25,7 @@ bool pirq_check_irq_routed(struct udevice *dev, int link, u8 irq) int base = priv->link_base; if (priv->config == PIRQ_VIA_PCI) - pirq = x86_pci_read_config8(priv->bdf, LINK_N2V(link, base)); + dm_pci_read_config8(dev->parent, LINK_N2V(link, base), &pirq); else pirq = readb(priv->ibase + LINK_N2V(link, base)); @@ -55,7 +55,7 @@ void pirq_assign_irq(struct udevice *dev, int link, u8 irq) return; if (priv->config == PIRQ_VIA_PCI) - x86_pci_write_config8(priv->bdf, LINK_N2V(link, base), irq); + dm_pci_write_config8(dev->parent, LINK_N2V(link, base), irq); else writeb(irq, priv->ibase + LINK_N2V(link, base)); } @@ -138,7 +138,7 @@ static int create_pirq_routing_table(struct udevice *dev) * 2) memory range decoding is enabled. * Hence we don't do any santify test here. */ - priv->ibase = x86_pci_read_config32(priv->bdf, ibase_off); + dm_pci_read_config32(dev->parent, ibase_off, &priv->ibase); priv->ibase &= ~0xf; } |