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| author | Simon Glass <sjg@chromium.org> | 2014-11-06 13:20:08 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-21 07:24:09 +0100 |
| commit | e1ffd81797d59652124bd9cda813a58644f5dea9 (patch) | |
| tree | f6cd2ec5d83ceb65f472480336ab1b542464afc0 /arch/x86/cpu/coreboot/coreboot.c | |
| parent | 8b37c7694f1eace82626d00fbfb85311ebf0d220 (diff) | |
| download | u-boot-imx-e1ffd81797d59652124bd9cda813a58644f5dea9.zip u-boot-imx-e1ffd81797d59652124bd9cda813a58644f5dea9.tar.gz u-boot-imx-e1ffd81797d59652124bd9cda813a58644f5dea9.tar.bz2 | |
x86: Fix up some missing prototypes
Some functions are missing prototypes. Fix those that are specific to x86.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/cpu/coreboot/coreboot.c')
| -rw-r--r-- | arch/x86/cpu/coreboot/coreboot.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c index 4e1349f..5527183 100644 --- a/arch/x86/cpu/coreboot/coreboot.c +++ b/arch/x86/cpu/coreboot/coreboot.c @@ -97,7 +97,7 @@ int board_eth_init(bd_t *bis) #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg)) #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1) -int board_final_cleanup(void) +void board_final_cleanup(void) { /* Un-cache the ROM so the kernel has one * more MTRR available. @@ -119,8 +119,6 @@ int board_final_cleanup(void) /* Issue SMI to Coreboot to lock down ME and registers */ printf("Finalizing Coreboot\n"); outb(0xcb, 0xb2); - - return 0; } void panic_puts(const char *str) |