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| author | Vadim Bendebury <vbendeb@chromium.org> | 2012-12-03 13:59:20 +0000 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2012-12-06 14:30:43 -0800 |
| commit | 7c71034d3ca2f4bd01812e94e813d35a78a27e34 (patch) | |
| tree | 683e5a0996921d383c21e3b7654e31807d063953 /arch/x86/cpu/coreboot/coreboot.c | |
| parent | b83058cd235acca426b1964e3aa394f7ecf16ccc (diff) | |
| download | u-boot-imx-7c71034d3ca2f4bd01812e94e813d35a78a27e34.zip u-boot-imx-7c71034d3ca2f4bd01812e94e813d35a78a27e34.tar.gz u-boot-imx-7c71034d3ca2f4bd01812e94e813d35a78a27e34.tar.bz2 | |
x86: Provide tick counter and frequency reference for Intel core architecture
Some u-boot modules rely on availability of get_ticks() and
get_tbclk() functions, reporting a free running clock and its
frequency respectively. Traditionally these functions return number
and frequency of timer interrupts.
Intel's core architecture processors however are known to run the
rdtsc instruction at a constant rate of the so called 'Max Non Turbo
ratio' times the external clock frequency which is 100MHz. This is
just as good for the timer tick functions in question.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/coreboot/coreboot.c')
0 files changed, 0 insertions, 0 deletions