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authorBin Meng <bmeng.cn@gmail.com>2015-10-11 21:37:43 -0700
committerSimon Glass <sjg@chromium.org>2015-10-21 07:46:27 -0600
commit8b185041a9f4c30dc5edb1e04c0834e931b8633f (patch)
tree118cd8408d8ca518dcf3981f711e0af596a8e7c0 /arch/x86/cpu/baytrail
parentff1e18af9dad21fe4963da80b3cf4170f8d6f209 (diff)
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x86: baytrail: Save mrc cache to spi flash
Save MRC cache to SPI flash in arch_misc_init(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/baytrail')
-rw-r--r--arch/x86/cpu/baytrail/valleyview.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index 4baaae6..215e0d0 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -8,6 +8,7 @@
#include <mmc.h>
#include <pci_ids.h>
#include <asm/irq.h>
+#include <asm/mrccache.h>
#include <asm/post.h>
static struct pci_device_id mmc_supported[] = {
@@ -43,6 +44,24 @@ int arch_misc_init(void)
if (!ll_boot_init())
return 0;
+#ifdef CONFIG_ENABLE_MRC_CACHE
+ /*
+ * We intend not to check any return value here, as even MRC cache
+ * is not saved successfully, it is not a severe error that will
+ * prevent system from continuing to boot.
+ */
+ mrccache_save();
+#endif
+
return pirq_init();
}
+
+int reserve_arch(void)
+{
+#ifdef CONFIG_ENABLE_MRC_CACHE
+ return mrccache_reserve();
+#else
+ return 0;
+#endif
+}
#endif