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authorBin Meng <bmeng.cn@gmail.com>2014-12-17 15:50:40 +0800
committerSimon Glass <sjg@chromium.org>2014-12-18 17:26:06 -0700
commit58f542de30e3bae9845726af36e0e25b5b458e8c (patch)
treec394746027c60ee0d7495847c248044efef06023 /arch/x86/Kconfig
parent240a79d95cc13bdeb02af5cc3451735df24715aa (diff)
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x86: Add queensbay and crownbay Kconfig files
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/Kconfig')
-rw-r--r--arch/x86/Kconfig13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index fdfb618..ebf72b3 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -32,6 +32,15 @@ config TARGET_CHROMEBOOK_LINK
and it provides a 2560x1700 high resolution touch-enabled LCD
display.
+config TARGET_CROWNBAY
+ bool "Support Intel Crown Bay CRB"
+ help
+ This is the Intel Crown Bay Customer Reference Board. It contains
+ the Intel Atom Processor E6xx populated on the COM Express module
+ with 1GB DDR2 soldered down memory and a carrier board with the
+ Intel Platform Controller Hub EG20T, other system components and
+ peripheral connectors for PCIe/SATA/USB/LAN/SD/UART/Audio/LVDS.
+
endchoice
config RAMBASE
@@ -310,8 +319,12 @@ endmenu
source "arch/x86/cpu/ivybridge/Kconfig"
+source "arch/x86/cpu/queensbay/Kconfig"
+
source "board/coreboot/coreboot/Kconfig"
source "board/google/chromebook_link/Kconfig"
+source "board/intel/crownbay/Kconfig"
+
endmenu