diff options
author | Bin Meng <bmeng.cn@gmail.com> | 2015-04-24 18:10:05 +0800 |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2015-04-29 18:51:49 -0600 |
commit | b5b6b0196017da0c2b4d483a2cd59be7810c1d7a (patch) | |
tree | 99b3f12b2f5f5f207fbec089a184562847cc990e /arch/x86/Kconfig | |
parent | 5e2400e8f873a1b7ee840554e4157c5f7900a863 (diff) | |
download | u-boot-imx-b5b6b0196017da0c2b4d483a2cd59be7810c1d7a.zip u-boot-imx-b5b6b0196017da0c2b4d483a2cd59be7810c1d7a.tar.gz u-boot-imx-b5b6b0196017da0c2b4d483a2cd59be7810c1d7a.tar.bz2 |
x86: Support platform PIRQ routing
On x86 boards, platform chipset receives up to four different
interrupt signals from PCI devices (INTA/B/C/D), which in turn
will be routed to chipset internal PIRQ lines then routed to
8259 PIC finally if configuring the whole system to work under
the so-called PIC mode (in contrast to symmetric IO mode which
uses IOAPIC).
We add two major APIs to aid this, one for routing PIRQ and the
other one for generating a PIRQ routing table.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/Kconfig')
-rw-r--r-- | arch/x86/Kconfig | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 3f1401a..aaceaef 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -442,6 +442,37 @@ config TSC_FREQ_IN_MHZ help The running frequency in MHz of Time-Stamp Counter (TSC). +menu "System tables" + +config GENERATE_PIRQ_TABLE + bool "Generate a PIRQ table" + default n + help + Generate a PIRQ routing table for this board. The PIRQ routing table + is generated by U-Boot in the system memory from 0xf0000 to 0xfffff + at every 16-byte boundary with a PCI IRQ routing signature ("$PIR"). + It specifies the interrupt router information as well how all the PCI + devices' interrupt pins are wired to PIRQs. + +endmenu + +config MAX_PIRQ_LINKS + int + default 8 + help + This variable specifies the number of PIRQ interrupt links which are + routable. On most older chipsets, this is 4, PIRQA through PIRQD. + Some newer chipsets offer more than four links, commonly up to PIRQH. + +config IRQ_SLOT_COUNT + int + default 128 + help + U-Boot can support up to 254 IRQ slot info in the PIRQ routing table + which in turns forms a table of exact 4KiB. The default value 128 + should be enough for most boards. If this does not fit your board, + change it according to your needs. + source "board/coreboot/coreboot/Kconfig" source "board/google/chromebook_link/Kconfig" |