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authorSimon Glass <sjg@chromium.org>2015-01-27 22:13:33 -0700
committerSimon Glass <sjg@chromium.org>2015-02-05 22:16:43 -0700
commit2d934e5703b712686c3ec67f6d5eeb137c68805d (patch)
tree31052345a6556760420f3c5435eae749d359e255 /arch/x86/Kconfig
parenteea0f11278d9104960dfb1fbfcddfb796a3e0bb5 (diff)
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x86: Rename MMCONF_BASE_ADDRESS and make it common across x86
This setting will be used by more than just ivybridge so make it common. Also rename it to PCIE_ECAM_BASE which is a more descriptive name. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/Kconfig')
-rw-r--r--arch/x86/Kconfig14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 90e828a..928fc60 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -356,4 +356,18 @@ source "board/google/chromebook_link/Kconfig"
source "board/intel/crownbay/Kconfig"
+config PCIE_ECAM_BASE
+ hex
+ default 0xe0000000
+ help
+ This is the memory-mapped address of PCI configuration space, which
+ is only available through the Enhanced Configuration Access
+ Mechanism (ECAM) with PCI Express. It can be set up almost
+ anywhere. Before it is set up, it is possible to access PCI
+ configuration space through I/O access, but memory access is more
+ convenient. Using this, PCI can be scanned and configured. This
+ should be set to a region that does not conflict with memory
+ assigned to PCI devices - i.e. the memory and prefetch regions, as
+ passed to pci_set_region().
+
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