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author | Anton Staaf <robotboy@chromium.org> | 2011-10-17 16:46:08 -0700 |
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committer | Wolfgang Denk <wd@denx.de> | 2011-10-23 20:50:42 +0200 |
commit | 3c3f8a7f3e58a9dbf6c2f3e462ad503eae35852a (patch) | |
tree | 4acb08219cf465f763b10b3e24e8af121efb018b /arch/sparc/include | |
parent | 2482e3c836a9342a6aa1a9885331aa60dbd1f8f8 (diff) | |
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sparc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Diffstat (limited to 'arch/sparc/include')
-rw-r--r-- | arch/sparc/include/asm/cache.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/cache.h b/arch/sparc/include/asm/cache.h index 03e8d94..44870e8 100644 --- a/arch/sparc/include/asm/cache.h +++ b/arch/sparc/include/asm/cache.h @@ -28,4 +28,14 @@ #include <linux/config.h> #include <asm/processor.h> +/* + * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise + * use 32-bytes, the cacheline size for Sparc. + */ +#ifdef CONFIG_SYS_CACHELINE_SIZE +#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE +#else +#define ARCH_DMA_MINALIGN 32 +#endif + #endif |