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author | Tom Rini <trini@konsulko.com> | 2015-11-13 10:04:34 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2015-11-13 10:04:34 -0500 |
commit | 618a51e9aefe1e03f498ea48bfab70a0b2c9be39 (patch) | |
tree | 565050bbf77d0d7f5d041bf490c3b6f8c83f6319 /arch/sparc/cpu/leon3/memcfg.h | |
parent | b67dfc5a1099eef2a323de23a78ba4e6d9b87633 (diff) | |
parent | e43ce3fca755d79635899b658a97f3c4a7dbf220 (diff) | |
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Merge branch 'series1_v2' of git://git.denx.de/u-boot-sparc
Diffstat (limited to 'arch/sparc/cpu/leon3/memcfg.h')
-rw-r--r-- | arch/sparc/cpu/leon3/memcfg.h | 90 |
1 files changed, 90 insertions, 0 deletions
diff --git a/arch/sparc/cpu/leon3/memcfg.h b/arch/sparc/cpu/leon3/memcfg.h new file mode 100644 index 0000000..a524896 --- /dev/null +++ b/arch/sparc/cpu/leon3/memcfg.h @@ -0,0 +1,90 @@ +/* GRLIB Memory controller setup structures + * + * (C) Copyright 2010, 2015 + * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MEMCFG_H__ +#define __MEMCFG_H__ + +/*********** Low Level Memory Controller Initalization ***********/ + +#ifndef __ASSEMBLER__ + +struct grlib_mctrl_handler; + +typedef void (*mctrl_handler_t)( + struct grlib_mctrl_handler *dev, + void *conf, + unsigned int ioarea + ); + +/* Memory Controller Handler Structure */ +struct grlib_mctrl_handler { + unsigned char type; /* 0x00. MASK: AHB MST&SLV, APB SLV */ + char index; /* 0x01. Unit number, 0, 1, 2... */ + char unused[2]; /* 0x02 */ + unsigned int ven_dev; /* 0x04. Device and Vendor */ + mctrl_handler_t func; /* 0x08. Memory Controller Handler */ + void *priv; /* 0x0c. Optional private data, ptr to + * info how to set up controller */ +}; + +extern struct grlib_mctrl_handler grlib_mctrl_handlers[]; + +#endif + +#define MH_STRUCT_SIZE (4*4) +#define MH_TYPE 0x00 +#define MH_INDEX 0x01 +#define MH_VENDOR_DEVICE 0x04 +#define MH_FUNC 0x08 +#define MH_PRIV 0x0c + +#define MH_TYPE_NONE DEV_NONE +#define MH_TYPE_AHB_MST DEV_AHB_MST +#define MH_TYPE_AHB_SLV DEV_AHB_SLV +#define MH_TYPE_APB_SLV DEV_APB_SLV + +#define MH_UNUSED {0, 0} +#define MH_END {DEV_NONE, 0, MH_UNUSED, AMBA_PNP_ID(0, 0), 0, 0} + +/*********** Low Level Memory Controller Initalization Handlers ***********/ + +#ifndef __ASSEMBLER__ +extern void _nomem_mctrl_init( + struct grlib_mctrl_handler *dev, + void *conf, + unsigned int ioarea_apbmst); + +struct mctrl_setup { + unsigned int reg_mask; /* Which registers to write */ + struct { + unsigned int mask; /* Mask used keep reg bits unchanged */ + unsigned int value; /* Value written to register */ + } regs[8]; +}; + +extern void _nomem_ahbmctrl_init( + struct grlib_mctrl_handler *dev, + void *conf, + unsigned int ioarea_apbmst); + +struct ahbmctrl_setup { + int ahb_mbar_no; /* MBAR to get register address from */ + unsigned int reg_mask; /* Which registers to write */ + struct { + unsigned int mask; /* Mask used keep reg bits unchanged */ + unsigned int value; /* Value written to register */ + } regs[8]; +}; +#endif + +/* mctrl_setup data structure defines */ +#define NREGS_OFS 0 +#define REGS_OFS 0x4 +#define REGS_SIZE 8 + +#endif |