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authorTom Rini <trini@ti.com>2014-11-17 08:43:40 -0500
committerTom Rini <trini@ti.com>2014-11-17 08:43:40 -0500
commitbdf790fabc8185112b3f699c8a25aab09c50239e (patch)
tree1ad02576f6849a800905eb47ccf4a878c5bfa6d1 /arch/sh
parent256d83cd6d8caf345ffba414a0f77f30d68caf8a (diff)
parent570dd7f441c2d2d2e83a9345608801c92e7d2c6f (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-sh
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/Kconfig94
-rw-r--r--arch/sh/cpu/sh2/config.mk4
-rw-r--r--arch/sh/cpu/sh3/config.mk2
-rw-r--r--arch/sh/cpu/sh4/config.mk2
-rw-r--r--arch/sh/include/asm/cache.h4
-rw-r--r--arch/sh/include/asm/processor.h6
-rw-r--r--arch/sh/lib/Makefile2
7 files changed, 83 insertions, 31 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 4bf9afc..ff8f5b5 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -1,77 +1,129 @@
menu "SuperH architecture"
depends on SH
-config SYS_ARCH
- default "sh"
+config CPU_SH2
+ bool
+
+config CPU_SH2A
+ bool
+ select CPU_SH2
+
+config CPU_SH3
+ bool
+
+config CPU_SH4
+ bool
+
+config CPU_SH4A
+ bool
+ select CPU_SH4
+
+config SH_32BIT
+ bool "32bit mode"
+ depends on CPU_SH4A
+ default n
+ help
+ SH4A has 2 physical memory maps. This use 32bit mode.
+ And this is board specific. Please check your board if you
+ want to use this.
choice
prompt "Target select"
config TARGET_RSK7203
- bool "Support rsk7203"
+ bool "RSK+ 7203"
+ select CPU_SH2A
config TARGET_RSK7264
- bool "Support rsk7264"
+ bool "RSK2+SH7264"
+ select CPU_SH2A
config TARGET_RSK7269
- bool "Support rsk7269"
+ bool "RSK2+SH7269"
+ select CPU_SH2A
config TARGET_MPR2
- bool "Support mpr2"
+ bool "Magic Panel Release 2 board"
+ select CPU_SH3
config TARGET_MS7720SE
bool "Support ms7720se"
+ select CPU_SH3
config TARGET_SHMIN
- bool "Support shmin"
+ bool "SHMIN"
+ select CPU_SH3
config TARGET_ESPT
- bool "Support espt"
+ bool "Data Technology ESPT-GIGA board"
+ select CPU_SH4
config TARGET_MS7722SE
- bool "Support ms7722se"
+ bool "SolutionEngine 7722"
+ select CPU_SH4
config TARGET_MS7750SE
- bool "Support ms7750se"
+ bool "SolutionEngine 7750"
+ select CPU_SH4
config TARGET_AP_SH4A_4A
- bool "Support ap_sh4a_4a"
+ bool "ALPHAPROJECT AP-SH4A-4A"
+ select CPU_SH4A
config TARGET_AP325RXA
- bool "Support ap325rxa"
+ bool "Renesas AP-325RXA"
+ select CPU_SH4
config TARGET_ECOVEC
- bool "Support ecovec"
+ bool "EcoVec"
+ select CPU_SH4A
config TARGET_MIGOR
- bool "Support MigoR"
+ bool "Migo-R"
+ select CPU_SH4
config TARGET_R0P7734
bool "Support r0p7734"
+ select CPU_SH4A
config TARGET_R2DPLUS
- bool "Support r2dplus"
+ bool "Renesas R2D-PLUS"
+ select CPU_SH4
config TARGET_R7780MP
- bool "Support r7780mp"
+ bool "R7780MP board"
+ select CPU_SH4A
config TARGET_SH7752EVB
- bool "Support sh7752evb"
+ bool "SH7752EVB"
+ select CPU_SH4A
config TARGET_SH7753EVB
- bool "Support sh7753evb"
+ bool "SH7753EVB"
+ select CPU_SH4
config TARGET_SH7757LCR
- bool "Support sh7757lcr"
+ bool "SH7757LCR"
+ select CPU_SH4A
config TARGET_SH7763RDP
- bool "Support sh7763rdp"
+ bool "SH7763RDP"
+ select CPU_SH4
config TARGET_SH7785LCR
- bool "Support sh7785lcr"
+ bool "SH7785LCR"
+ select CPU_SH4A
endchoice
+config SYS_ARCH
+ default "sh"
+
+config SYS_CPU
+ default "sh2" if CPU_SH2
+ default "sh3" if CPU_SH3
+ default "sh4" if CPU_SH4
+
source "board/alphaproject/ap_sh4a_4a/Kconfig"
source "board/espt/Kconfig"
source "board/mpr2/Kconfig"
diff --git a/arch/sh/cpu/sh2/config.mk b/arch/sh/cpu/sh2/config.mk
index 4904d76..12e202d 100644
--- a/arch/sh/cpu/sh2/config.mk
+++ b/arch/sh/cpu/sh2/config.mk
@@ -7,11 +7,11 @@
#
ENDIANNESS += -EB
-ifdef CONFIG_SH2A
+ifdef CONFIG_CPU_SH2A
PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb
else # SH2
PLATFORM_CPPFLAGS += -m3e -mb
endif
-PLATFORM_CPPFLAGS += -DCONFIG_SH2 $(call cc-option,-mno-fdpic)
+PLATFORM_CPPFLAGS += $(call cc-option,-mno-fdpic)
PLATFORM_LDFLAGS += $(ENDIANNESS)
diff --git a/arch/sh/cpu/sh3/config.mk b/arch/sh/cpu/sh3/config.mk
index 24b5c47..dcafd19 100644
--- a/arch/sh/cpu/sh3/config.mk
+++ b/arch/sh/cpu/sh3/config.mk
@@ -11,4 +11,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
#
-PLATFORM_CPPFLAGS += -DCONFIG_SH3 -m3
+PLATFORM_CPPFLAGS += -m3
diff --git a/arch/sh/cpu/sh4/config.mk b/arch/sh/cpu/sh4/config.mk
index 5773d4f..4fb2dc2 100644
--- a/arch/sh/cpu/sh4/config.mk
+++ b/arch/sh/cpu/sh4/config.mk
@@ -8,4 +8,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
#
-PLATFORM_CPPFLAGS += -DCONFIG_SH4 -m4-nofpu
+PLATFORM_CPPFLAGS += -m4-nofpu
diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h
index 0698a37..abaf405 100644
--- a/arch/sh/include/asm/cache.h
+++ b/arch/sh/include/asm/cache.h
@@ -1,7 +1,7 @@
#ifndef __ASM_SH_CACHE_H
#define __ASM_SH_CACHE_H
-#if defined(CONFIG_SH4)
+#if defined(CONFIG_CPU_SH4)
int cache_control(unsigned int cmd);
@@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; };
*/
#define ARCH_DMA_MINALIGN 32
-#endif /* CONFIG_SH4 */
+#endif /* CONFIG_CPU_SH4 */
/*
* Use the L1 data cache line size value for the minimum DMA buffer alignment
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index b8677da..b07fe54 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -1,10 +1,10 @@
#ifndef _ASM_SH_PROCESSOR_H_
#define _ASM_SH_PROCESSOR_H_
-#if defined(CONFIG_SH2)
+#if defined(CONFIG_CPU_SH2)
# include <asm/cpu_sh2.h>
-#elif defined(CONFIG_SH3)
+#elif defined(CONFIG_CPU_SH3)
# include <asm/cpu_sh3.h>
-#elif defined(CONFIG_SH4)
+#elif defined(CONFIG_CPU_SH4)
# include <asm/cpu_sh4.h>
#endif
#endif
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile
index 8a84b24..1304f4e 100644
--- a/arch/sh/lib/Makefile
+++ b/arch/sh/lib/Makefile
@@ -8,7 +8,7 @@
obj-y += board.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
-ifeq ($(CONFIG_SH2),y)
+ifeq ($(CONFIG_CPU_SH2),y)
obj-y += time_sh2.o
else
obj-y += time.o