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| author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2014-01-09 12:22:12 +0900 |
|---|---|---|
| committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2014-01-09 12:47:15 +0900 |
| commit | 6b87abe3ac357649a990c05a6a5f9fd232cca21c (patch) | |
| tree | f121f7d1e2f4bae0b22ae92706a493c3c13c2399 /arch/sh | |
| parent | 8f0960e8378e0fc14d6216f60910994c217d3d57 (diff) | |
| download | u-boot-imx-6b87abe3ac357649a990c05a6a5f9fd232cca21c.zip u-boot-imx-6b87abe3ac357649a990c05a6a5f9fd232cca21c.tar.gz u-boot-imx-6b87abe3ac357649a990c05a6a5f9fd232cca21c.tar.bz2 | |
sh: sh4: Remove CONFIG_SH4A definition from source code
SH4 and SH4A are compatible. But some instructions are different from these.
In Linux kernel, It is treated as a separate CPU, but for now, I think that
there is no need to divide especially in the U-Boot.
This removes CONFIG_SH4A definition from source code, SH4A is treated as SH4.
And this fix white space.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'arch/sh')
| -rw-r--r-- | arch/sh/cpu/sh2/cpu.c | 4 | ||||
| -rw-r--r-- | arch/sh/cpu/sh4/cpu.c | 4 | ||||
| -rw-r--r-- | arch/sh/include/asm/cache.h | 4 | ||||
| -rw-r--r-- | arch/sh/include/asm/processor.h | 5 |
4 files changed, 4 insertions, 13 deletions
diff --git a/arch/sh/cpu/sh2/cpu.c b/arch/sh/cpu/sh2/cpu.c index 18479a4..a2f856f 100644 --- a/arch/sh/cpu/sh2/cpu.c +++ b/arch/sh/cpu/sh2/cpu.c @@ -23,11 +23,7 @@ int checkcpu(void) { -#if defined(CONFIG_SH2A) - puts("CPU: SH2A\n"); -#else puts("CPU: SH2\n"); -#endif return 0; } diff --git a/arch/sh/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c index 91133a3..e8ee0a4 100644 --- a/arch/sh/cpu/sh4/cpu.c +++ b/arch/sh/cpu/sh4/cpu.c @@ -13,11 +13,7 @@ int checkcpu(void) { -#ifdef CONFIG_SH4A - puts("CPU: SH-4A\n"); -#else puts("CPU: SH4\n"); -#endif return 0; } diff --git a/arch/sh/include/asm/cache.h b/arch/sh/include/asm/cache.h index b21dc44..0698a37 100644 --- a/arch/sh/include/asm/cache.h +++ b/arch/sh/include/asm/cache.h @@ -1,7 +1,7 @@ #ifndef __ASM_SH_CACHE_H #define __ASM_SH_CACHE_H -#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) +#if defined(CONFIG_SH4) int cache_control(unsigned int cmd); @@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; }; */ #define ARCH_DMA_MINALIGN 32 -#endif /* CONFIG_SH4 || CONFIG_SH4A */ +#endif /* CONFIG_SH4 */ /* * Use the L1 data cache line size value for the minimum DMA buffer alignment diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index 938a89c..c3441ff 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h @@ -3,10 +3,9 @@ #if defined(CONFIG_SH2) || \ defined (CONFIG_SH2A) # include <asm/cpu_sh2.h> -#elif defined (CONFIG_SH3) +#elif defined(CONFIG_SH3) # include <asm/cpu_sh3.h> -#elif defined (CONFIG_SH4) || \ - defined (CONFIG_SH4A) +#elif defined(CONFIG_SH4) # include <asm/cpu_sh4.h> #endif #endif |