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authorMinkyu Kang <mk7.kang@samsung.com>2010-04-19 10:26:18 +0900
committerMinkyu Kang <mk7.kang@samsung.com>2010-04-19 10:26:18 +0900
commit83653121d7382fccfe329cb732f77f116341ef1d (patch)
tree0b1ce6764252af15dfb2614372de98a44a7ec61f /arch/sh/cpu/sh3/start.S
parent0f1f21a345e02a68ec16f7ab9e7dc687f9276089 (diff)
parent07739bcef5da07cc4a4edef8b91014ccc332eda3 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts: cpu/arm1176/cpu.c cpu/arm1176/start.S cpu/arm_cortexa8/s5pc1xx/Makefile cpu/arm_cortexa8/s5pc1xx/clock.c drivers/serial/serial_s5p.c include/asm-arm/arch-s5pc1xx/clk.h include/asm-arm/arch-s5pc1xx/gpio.h include/asm-arm/arch-s5pc1xx/uart.h Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/sh/cpu/sh3/start.S')
-rw-r--r--arch/sh/cpu/sh3/start.S77
1 files changed, 77 insertions, 0 deletions
diff --git a/arch/sh/cpu/sh3/start.S b/arch/sh/cpu/sh3/start.S
new file mode 100644
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--- /dev/null
+++ b/arch/sh/cpu/sh3/start.S
@@ -0,0 +1,77 @@
+/*
+ * (C) Copyright 2007
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
+ * (C) Copyright 2007
+ * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+
+ .text
+ .align 2
+
+ .global _start
+_start:
+ mov.l ._lowlevel_init, r0
+100: bsrf r0
+ nop
+
+ bsr 1f
+ nop
+1: sts pr, r5
+ mov.l ._reloc_dst, r4
+ add #(_start-1b), r5
+ mov.l ._reloc_dst_end, r6
+
+2: mov.l @r5+, r1
+ mov.l r1, @r4
+ add #4, r4
+ cmp/hs r6, r4
+ bf 2b
+
+ mov.l ._bss_start, r4
+ mov.l ._bss_end, r5
+ mov #0, r1
+
+3: mov.l r1, @r4 /* bss clear */
+ add #4, r4
+ cmp/hs r5, r4
+ bf 3b
+
+ mov.l ._gd_init, r13 /* global data */
+ mov.l ._stack_init, r15 /* stack */
+
+ mov.l ._sh_generic_init, r0
+ jsr @r0
+ nop
+
+loop:
+ bra loop
+
+ .align 2
+
+._lowlevel_init: .long (lowlevel_init - (100b + 4))
+._reloc_dst: .long reloc_dst
+._reloc_dst_end: .long reloc_dst_end
+._bss_start: .long bss_start
+._bss_end: .long bss_end
+._gd_init: .long (_start - CONFIG_SYS_GBL_DATA_SIZE)
+._stack_init: .long (_start - CONFIG_SYS_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
+._sh_generic_init: .long sh_generic_init