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authorWolfgang Denk <wd@denx.de>2010-05-09 01:16:51 +0200
committerWolfgang Denk <wd@denx.de>2010-05-09 01:16:51 +0200
commitab92d0fd9abd0d4726878a80c6baf3a0f94770b8 (patch)
treeebea3c52a510d2a5d39a378f305d878d7fc0344d /arch/powerpc
parent5794619e29c5e22280b0b09b2ea6bc3d2e00da3f (diff)
parentfd194f82d1c30802f0597a3e359fdc03ed397367 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/fsl_lbc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index dfe8f79..03ae6a7 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -245,6 +245,7 @@
#define MxMR_DSx_4_CYCL 0x00c00000 /* 4 cycle Disable Period */
#define MxMR_DSx_MSK 0x00c00000 /* Disable Timer Period Mask */
#define MxMR_AMx_MSK 0x07000000 /* Addess Multiplex Size Mask */
+#define MxMR_UWPL 0x08000000 /* LUPWAIT Polarity Mask */
#define MxMR_OP_NORM 0x00000000 /* Normal Operation */
#define MxMR_OP_WARR 0x10000000 /* Write to Array */
#define MxMR_OP_RARR 0x20000000 /* Read from Array */