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author | Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com> | 2013-01-25 10:38:53 +0000 |
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committer | Andy Fleming <afleming@freescale.com> | 2013-05-02 16:56:42 -0500 |
commit | 3c1bfc04c6292070ac4bd0a39976a3dbe6f00aa0 (patch) | |
tree | b5f8fcf6ea209d05096c5bb64e4796cfff44601a /arch/powerpc | |
parent | acac075b94ede46b2d7a534437bb0431749e57a7 (diff) | |
download | u-boot-imx-3c1bfc04c6292070ac4bd0a39976a3dbe6f00aa0.zip u-boot-imx-3c1bfc04c6292070ac4bd0a39976a3dbe6f00aa0.tar.gz u-boot-imx-3c1bfc04c6292070ac4bd0a39976a3dbe6f00aa0.tar.bz2 |
powerpc/mpc85xx: Add revision properties in portal device tree node 'pme'
The 'fsl,pme-rev1' and 'fsl-pme-rev2' properties have been added to the
pme portal node. This is required for software to determine which version
of PME hardware is present and take appropriate actions.
These properties are a direct reflection of the corresponding ccsr pme
register value.
Also removed unnecessary static global variables.
Signed-off-by: Jeffrey Ladouceur <Jeffrey.Ladouceur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/portals.c | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/portals.c b/arch/powerpc/cpu/mpc85xx/portals.c index b59ef69..d529095 100644 --- a/arch/powerpc/cpu/mpc85xx/portals.c +++ b/arch/powerpc/cpu/mpc85xx/portals.c @@ -30,11 +30,9 @@ #include <asm/fsl_portals.h> #include <asm/fsl_liodn.h> -static ccsr_qman_t *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR; -static ccsr_bman_t *bman = (void *)CONFIG_SYS_FSL_BMAN_ADDR; - void setup_portals(void) { + ccsr_qman_t *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR; #ifdef CONFIG_FSL_CORENET int i; @@ -166,6 +164,20 @@ static int fdt_qportal(void *blob, int off, int id, char *name, num = get_dpaa_liodn(dev, &liodns[0], id); ret = fdt_setprop(blob, childoff, "fsl,liodn", &liodns[0], sizeof(u32) * num); + if (!strncmp(name, "pme", 3)) { + u32 pme_rev1, pme_rev2; + ccsr_pme_t *pme_regs = + (void *)CONFIG_SYS_FSL_CORENET_PME_ADDR; + + pme_rev1 = in_be32(&pme_regs->pm_ip_rev_1); + pme_rev2 = in_be32(&pme_regs->pm_ip_rev_2); + ret = fdt_setprop(blob, childoff, + "fsl,pme-rev1", &pme_rev1, sizeof(u32)); + if (ret < 0) + return ret; + ret = fdt_setprop(blob, childoff, + "fsl,pme-rev2", &pme_rev2, sizeof(u32)); + } #endif } else { return childoff; @@ -183,6 +195,7 @@ void fdt_fixup_qportals(void *blob) int off, err; unsigned int maj, min; unsigned int ip_cfg; + ccsr_qman_t *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR; u32 rev_1 = in_be32(&qman->ip_rev_1); u32 rev_2 = in_be32(&qman->ip_rev_2); char compat[64]; @@ -272,6 +285,7 @@ void fdt_fixup_bportals(void *blob) int off, err; unsigned int maj, min; unsigned int ip_cfg; + ccsr_bman_t *bman = (void *)CONFIG_SYS_FSL_BMAN_ADDR; u32 rev_1 = in_be32(&bman->ip_rev_1); u32 rev_2 = in_be32(&bman->ip_rev_2); char compat[64]; |