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authorPrabhakar Kushwaha <prabhakar@freescale.com>2012-04-10 22:48:59 +0000
committerWolfgang Denk <wd@denx.de>2012-08-09 22:23:14 +0200
commita16a5cccfb30f4a4bd4c5798d899138250765b38 (patch)
treec3147e53e7ab962ff284fef715686396adb7670a /arch/powerpc
parentf75325e1927398f7e18e15f186b1fc52174cc19f (diff)
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powerpc:Fix return type & parameter passed for I/O functions
Return type of in_8, in_be16 and in_le16 should not be'int'. Update it to type u8/u16/u32. Although 'unsigned' for in_be32 and in_le32 is correct. But to make return type uniform across the file changed to u32 Similarly, parameter passed to out_8, out_be16, out_le16 ,out_be32 & out_le32 should not be 'int'.Change it to type u8/u16/u32. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/io.h30
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 6b52a94..9e20861 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -162,9 +162,9 @@ static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
* is actually performed (i.e. the data has come back) before we start
* executing any following instructions.
*/
-extern inline int in_8(const volatile unsigned char __iomem *addr)
+extern inline u8 in_8(const volatile unsigned char __iomem *addr)
{
- int ret;
+ u8 ret;
__asm__ __volatile__(
"sync; lbz%U1%X1 %0,%1;\n"
@@ -173,7 +173,7 @@ extern inline int in_8(const volatile unsigned char __iomem *addr)
return ret;
}
-extern inline void out_8(volatile unsigned char __iomem *addr, int val)
+extern inline void out_8(volatile unsigned char __iomem *addr, u8 val)
{
__asm__ __volatile__("sync;\n"
"stb%U0%X0 %1,%0;\n"
@@ -181,9 +181,9 @@ extern inline void out_8(volatile unsigned char __iomem *addr, int val)
: "r" (val));
}
-extern inline int in_le16(const volatile unsigned short __iomem *addr)
+extern inline u16 in_le16(const volatile unsigned short __iomem *addr)
{
- int ret;
+ u16 ret;
__asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
"twi 0,%0,0;\n"
@@ -192,9 +192,9 @@ extern inline int in_le16(const volatile unsigned short __iomem *addr)
return ret;
}
-extern inline int in_be16(const volatile unsigned short __iomem *addr)
+extern inline u16 in_be16(const volatile unsigned short __iomem *addr)
{
- int ret;
+ u16 ret;
__asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
"twi 0,%0,0;\n"
@@ -202,20 +202,20 @@ extern inline int in_be16(const volatile unsigned short __iomem *addr)
return ret;
}
-extern inline void out_le16(volatile unsigned short __iomem *addr, int val)
+extern inline void out_le16(volatile unsigned short __iomem *addr, u16 val)
{
__asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
"r" (val), "r" (addr));
}
-extern inline void out_be16(volatile unsigned short __iomem *addr, int val)
+extern inline void out_be16(volatile unsigned short __iomem *addr, u16 val)
{
__asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
}
-extern inline unsigned in_le32(const volatile unsigned __iomem *addr)
+extern inline u32 in_le32(const volatile unsigned __iomem *addr)
{
- unsigned ret;
+ u32 ret;
__asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
"twi 0,%0,0;\n"
@@ -224,9 +224,9 @@ extern inline unsigned in_le32(const volatile unsigned __iomem *addr)
return ret;
}
-extern inline unsigned in_be32(const volatile unsigned __iomem *addr)
+extern inline u32 in_be32(const volatile unsigned __iomem *addr)
{
- unsigned ret;
+ u32 ret;
__asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
"twi 0,%0,0;\n"
@@ -234,13 +234,13 @@ extern inline unsigned in_be32(const volatile unsigned __iomem *addr)
return ret;
}
-extern inline void out_le32(volatile unsigned __iomem *addr, int val)
+extern inline void out_le32(volatile unsigned __iomem *addr, u32 val)
{
__asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
"r" (val), "r" (addr));
}
-extern inline void out_be32(volatile unsigned __iomem *addr, int val)
+extern inline void out_be32(volatile unsigned __iomem *addr, u32 val)
{
__asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
}