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| author | Mats Kärrman <mats.karrman@tritech.se> | 2013-04-09 17:10:59 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-04-10 10:31:02 -0400 |
| commit | fac150e83f403933e9ffc9d01f858c4a6313874e (patch) | |
| tree | bb4ba2875fd12abdc370040eb79af5f1125407be /arch/powerpc | |
| parent | 645b271a6039e79b368f027a5624dc0820441733 (diff) | |
| download | u-boot-imx-fac150e83f403933e9ffc9d01f858c4a6313874e.zip u-boot-imx-fac150e83f403933e9ffc9d01f858c4a6313874e.tar.gz u-boot-imx-fac150e83f403933e9ffc9d01f858c4a6313874e.tar.bz2 | |
powerpc/lib: fix unsafe register handling in wait_ticks
If watchdog is enabled, the arch/powerpc/lib/ticks.S::wait_ticks() function
calls the function specified by the WATCHDOG_RESET macro.
The wait_ticks function depends on the registers r0, r6 and r7 being
preserved however that is not guaranteed, e.g. if the reset function is a
C function this will probably overwrite r0 and cause an endless loop.
The following patch changes to using r14+r15 instead of r6+r7 (to resemble
what would have been generated by a C compiler) and saves all necessary
registers on the stack.
The patch has been tested on a custom MPC5125 based machine using the 512x
powerpc architecture.
Signed-off-by: Mats Karrman <mats.karrman@tritech.se>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Tested-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/lib/ticks.S | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/arch/powerpc/lib/ticks.S b/arch/powerpc/lib/ticks.S index 1781039..63114bb 100644 --- a/arch/powerpc/lib/ticks.S +++ b/arch/powerpc/lib/ticks.S @@ -50,19 +50,24 @@ wait_ticks: stwu r1, -16(r1) mflr r0 /* save link register */ stw r0, 20(r1) /* Use r0 or GDB will be unhappy */ - mr r7, r3 /* save tick count */ + stw r14, 12(r1) /* save used registers */ + stw r15, 8(r1) + mr r14, r3 /* save tick count */ bl get_ticks /* Get start time */ /* Calculate end time */ - addc r7, r4, r7 /* Compute end time lower */ - addze r6, r3 /* and end time upper */ + addc r14, r4, r14 /* Compute end time lower */ + addze r15, r3 /* and end time upper */ WATCHDOG_RESET /* Trigger watchdog, if needed */ 1: bl get_ticks /* Get current time */ - subfc r4, r4, r7 /* Subtract current time from end time */ - subfe. r3, r3, r6 + subfc r4, r4, r14 /* Subtract current time from end time */ + subfe. r3, r3, r15 bge 1b /* Loop until time expired */ - mtlr r0 /* restore link register */ + lwz r15, 8(r1) /* restore saved registers */ + lwz r14, 12(r1) + lwz r0, 20(r1) addi r1,r1,16 + mtlr r0 blr |