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authorShaveta Leekha <shaveta@freescale.com>2013-03-25 07:40:24 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-24 16:54:14 -0500
commit6eaeba23ddc5ccde5c97ef919ffcbf44ecad73dd (patch)
treeaa6aaeac0dc0fa083b3edae9420050318e652e9d /arch/powerpc
parente14cdc0a695d4cdb40843e1e7c6ee29c471a3fcc (diff)
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powerpc/b4860qds: Add LAW Target ID and Create LAW entry for Maple
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/fsl_law.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h
index f9cec8e..90b264d 100644
--- a/arch/powerpc/include/asm/fsl_law.h
+++ b/arch/powerpc/include/asm/fsl_law.h
@@ -70,6 +70,8 @@ enum law_trgt_if {
LAW_TRGT_IF_DCSR = 0x1d,
LAW_TRGT_IF_LBC = 0x1f,
LAW_TRGT_IF_QMAN = 0x3c,
+
+ LAW_TRGT_IF_MAPLE = 0x50,
};
#define LAW_TRGT_IF_DDR LAW_TRGT_IF_DDR_1
#define LAW_TRGT_IF_IFC LAW_TRGT_IF_LBC