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authorAneesh Bansal <aneesh.bansal@freescale.com>2014-03-18 23:40:42 +0530
committerYork Sun <yorksun@freescale.com>2014-04-22 17:58:46 -0700
commit796a78100166809f7e5515dd8806b2af703714a0 (patch)
tree1128006652861aef036e28f8c2877902b599fe65 /arch/powerpc
parentfb4a2409b46c98672557bb07dec8e873bef1e23c (diff)
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powerpc/mpc85xx: SECURE BOOT- Add secure boot target for T4240QDS and T4160QDS
Secure Boot Target is added for T4240QDS and T4160QDS Changes: For Secure boot, CPC is configured as SRAM and used as house keeping area which needs to be disabled. So CONFIG_SYS_CPC_REINIT_F is defined for CONFIG_T4240QDS. Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/fsl_secure_boot.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h
index c705d5a..b4a0f48 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -17,7 +17,7 @@
#endif
#define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000
-#if defined(CONFIG_B4860QDS)
+#if defined(CONFIG_B4860QDS) || defined(CONFIG_T4240QDS)
#define CONFIG_SYS_CPC_REINIT_F
#undef CONFIG_SYS_INIT_L3_ADDR
#define CONFIG_SYS_INIT_L3_ADDR 0xbff00000