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authorWolfgang Denk <wd@denx.de>2012-01-13 20:38:49 +0100
committerWolfgang Denk <wd@denx.de>2012-01-13 20:38:49 +0100
commit670c24f6f32c8320cbb950e19e75fa8cdc8af88c (patch)
treec78f685a6b104cd88def187574c8fdfcd4fbbcc4 /arch/powerpc
parentf5bc38aba82a3cd96ee5ddbae3047f1caa31ed3c (diff)
parent3dc23c7c3093171d72da37cdefd82a81a5f613f5 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx: fsl_lbc: add printout of LCRR and LBCR to local bus regs sbc8548: Fix up local bus init to be frequency aware sbc8548: enable support for hardware SPD errata workaround sbc8548: relocate fixed ddr init code to ddr.c file sbc8548: Make enabling SPD RAM configuration work sbc8548: Fix LBC SDRAM initialization settings sbc8548: enable ability to boot from alternate flash sbc8548: relocate 64MB user flash to sane boundary Revert "SBC8548: fix address mask to allow 64M flash" MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM eXMeritus HWW-1U-1A: Minor environment variable tweaks
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/cpu/mpc8xxx/fsl_lbc.c2
-rw-r--r--arch/powerpc/include/asm/fsl_lbc.h2
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
index 587576b..023ac9a 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
@@ -28,6 +28,8 @@ void print_lbc_regs(void)
printf("BR%d\t0x%08X\tOR%d\t0x%08X\n",
i, get_lbc_br(i), i, get_lbc_or(i));
}
+ printf("LBCR\t0x%08X\tLCRR\t0x%08X\n",
+ get_lbc_lbcr(), get_lbc_lcrr());
}
void init_early_memctl_regs(void)
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index bf572b7..2a23d84 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -475,6 +475,8 @@ extern void init_early_memctl_regs(void);
extern void upmconfig(uint upm, uint *table, uint size);
#define LBC_BASE_ADDR ((fsl_lbc_t *)CONFIG_SYS_LBC_ADDR)
+#define get_lbc_lcrr() (in_be32(&(LBC_BASE_ADDR)->lcrr))
+#define get_lbc_lbcr() (in_be32(&(LBC_BASE_ADDR)->lbcr))
#define get_lbc_br(i) (in_be32(&(LBC_BASE_ADDR)->bank[i].br))
#define get_lbc_or(i) (in_be32(&(LBC_BASE_ADDR)->bank[i].or))
#define set_lbc_br(i, v) (out_be32(&(LBC_BASE_ADDR)->bank[i].br, v))