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authorStephen Warren <swarren@nvidia.com>2014-02-06 13:13:06 -0700
committerMarek Vasut <marex@denx.de>2014-03-10 18:53:36 +0100
commit8165e34bf4f1b663ca37f7ead4bb029b4d9da74e (patch)
tree645ab73d4a6fbdd83608dd8876f1c7cf9cefbbe0 /arch/powerpc
parent2456b97f0c9411d0bc2637ba1033a910c8b4b971 (diff)
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usb: ehci: fully align interrupt QHs/QTDs
These data structures are passed to cache-flushing routines, and hence must be conform to both the USB the cache-flusing alignment requirements. That means aligning to USB_DMA_MINALIGN. This is important on systems where cache lines are >32 bytes. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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