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authorTimur Tabi <timur@freescale.com>2012-07-06 07:39:26 +0000
committerAndy Fleming <afleming@freescale.com>2012-08-08 18:32:15 -0500
commit7ee411071f31c856107e6b29fcd8df53ae4d7349 (patch)
treefbbbdd41ce72ee5ce148cc9b09eea016cf2a1109 /arch/powerpc
parent145dbc02501bba43cfee952d5669406c871be6d8 (diff)
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powerpc/85xx: improve definition of BR_PHYS_ADDR macro
The BR_PHYS_ADDR(x) macro was missing parentheses around "x" in the macro definition, so callers had to supply their own parenthesis. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/include/asm/fsl_lbc.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 2a23d84..d1def75 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -82,10 +82,10 @@ void lbc_sdram_init(void);
/* Convert an address into the right format for the BR registers */
#if defined(CONFIG_PHYS_64BIT) && !defined(CONFIG_FSL_ELBC)
-#define BR_PHYS_ADDR(x) ((unsigned long)((x & 0x0ffff8000ULL) | \
- ((x & 0x300000000ULL) >> 19)))
+#define BR_PHYS_ADDR(x) \
+ ((u32)(((x) & 0x0ffff8000ULL) | (((x) & 0x300000000ULL) >> 19)))
#else
-#define BR_PHYS_ADDR(x) (x & 0xffff8000)
+#define BR_PHYS_ADDR(x) ((u32)(x) & 0xffff8000)
#endif
/* OR - Option Registers