diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2011-11-09 10:05:01 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-11-11 07:49:01 -0600 |
| commit | c1ee16b8e02cd974d7ce9bfb9578e6a1557c2af2 (patch) | |
| tree | 4475ab7089eaab49711ae3351fc7818cb21d892c /arch/powerpc | |
| parent | 667bc17e07e0675164e0291c3bdbd7866de0248c (diff) | |
| download | u-boot-imx-c1ee16b8e02cd974d7ce9bfb9578e6a1557c2af2.zip u-boot-imx-c1ee16b8e02cd974d7ce9bfb9578e6a1557c2af2.tar.gz u-boot-imx-c1ee16b8e02cd974d7ce9bfb9578e6a1557c2af2.tar.bz2 | |
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c: Fix GCC 4.6 build warning
Fix:
fsl_corenet_serdes.c: In function 'fsl_serdes_init':
fsl_corenet_serdes.c:511:8: warning: variable 'buf' set but not used [-Wunused-but-set-variable]
fsl_corenet_serdes.c:498:18: warning: variable 'lane_prtcl' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index 89ed5b4..4b52dad 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -495,7 +495,6 @@ void fsl_serdes_init(void) int cfg; serdes_corenet_t *srds_regs; int lane, bank, idx; - enum srds_prtcl lane_prtcl; int have_bank[SRDS_MAX_BANK] = {}; #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8 u32 serdes8_devdisr = 0; @@ -507,6 +506,7 @@ void fsl_serdes_init(void) #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES_A001 int need_serdes_a001; /* TRUE == need work-around for SERDES A001 */ #endif +#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8 char buffer[HWCONFIG_BUFFER_SIZE]; char *buf = NULL; @@ -516,6 +516,7 @@ void fsl_serdes_init(void) */ if (getenv_f("hwconfig", buffer, sizeof(buffer)) > 0) buf = buffer; +#endif /* Is serdes enabled at all? */ if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN)) @@ -617,7 +618,10 @@ void fsl_serdes_init(void) } } +#if defined(CONFIG_SYS_P4080_ERRATUM_SERDES8) || defined (CONFIG_SYS_P4080_ERRATUM_SERDES9) for (lane = 0; lane < SRDS_MAX_LANES; lane++) { + enum srds_prtcl lane_prtcl; + idx = serdes_get_lane_idx(lane); lane_prtcl = serdes_get_prtcl(cfg, lane); @@ -729,6 +733,7 @@ void fsl_serdes_init(void) #endif } +#endif #ifdef DEBUG puts("\n"); |