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| author | Timur Tabi <timur@freescale.com> | 2011-04-01 13:19:36 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-28 22:09:23 -0500 |
| commit | da30b9fd97f031a6b6863359f3d4c6633e5c7035 (patch) | |
| tree | 8193ca2746ebc44306440f5e203f954e95d88586 /arch/powerpc/include | |
| parent | 82c9dfdc20b1bf86e732e61e7230cfa7c933247f (diff) | |
| download | u-boot-imx-da30b9fd97f031a6b6863359f3d4c6633e5c7035.zip u-boot-imx-da30b9fd97f031a6b6863359f3d4c6633e5c7035.tar.gz u-boot-imx-da30b9fd97f031a6b6863359f3d4c6633e5c7035.tar.bz2 | |
powerpc/85xx: Implement work-around for P4080 erratum SERDES-A005
SerDes PLL bandwidth default setting is incorrect when no lanes are
configured as PCI Express.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index da2e998..b8b8914 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -311,6 +311,7 @@ #define CONFIG_SYS_P4080_ERRATUM_CPU22 #define CONFIG_SYS_P4080_ERRATUM_SERDES8 #define CONFIG_SYS_P4080_ERRATUM_SERDES9 +#define CONFIG_SYS_P4080_ERRATUM_SERDES_A005 /* P5010 is single core version of P5020 */ #elif defined(CONFIG_PPC_P5010) |