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author | Timur Tabi <timur@freescale.com> | 2011-04-14 15:37:06 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-28 22:09:23 -0500 |
commit | f68d3063491442ca5d871d3019a9d3f195873ed7 (patch) | |
tree | 10ebc71b9adaee748e9254e1ebe3338b2392ec21 /arch/powerpc/include | |
parent | 7d6d9ba9d0cb0bb2fefc4ce16c191c1bbad7b656 (diff) | |
download | u-boot-imx-f68d3063491442ca5d871d3019a9d3f195873ed7.zip u-boot-imx-f68d3063491442ca5d871d3019a9d3f195873ed7.tar.gz u-boot-imx-f68d3063491442ca5d871d3019a9d3f195873ed7.tar.bz2 |
powerpc/85xx: Extend SERDES9 erratum work-around to SGMII, SRIO, and AURORA
Part of the SERDES9 erratum work-around is to set some bits in the SerDes
TTLCR0 register for lanes configured as XAUI, SGMII, SRIO, or AURORA. The
current code does this only for XAUI, so extend it to the other protocols.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 5395c7f..f85cee2 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2139,6 +2139,7 @@ typedef struct serdes_corenet { u32 res3; u32 ttlcr0; /* Transition Tracking Loop Ctrl 0 */ #define SRDS_TTLCR0_FLT_SEL_MASK 0x3f000000 +#define SRDS_TTLCR0_FLT_SEL_750PPM 0x03000000 #define SRDS_TTLCR0_PM_DIS 0x00004000 u32 res4[7]; } lane[24]; |