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| author | ramneek mehresh <ramneek.mehresh@freescale.com> | 2013-08-05 16:00:16 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-08-14 10:58:01 -0700 |
| commit | 9dee205d78402c6c48076735859f4e1a293cf693 (patch) | |
| tree | 6879af7ce09433b68c582d6c3b5e14a184fb3252 /arch/powerpc/include | |
| parent | a4c955bc3b23a38dc2c5c60b655a4d01eff93cec (diff) | |
| download | u-boot-imx-9dee205d78402c6c48076735859f4e1a293cf693.zip u-boot-imx-9dee205d78402c6c48076735859f4e1a293cf693.tar.gz u-boot-imx-9dee205d78402c6c48076735859f4e1a293cf693.tar.bz2 | |
fsl/usb: Move USB internal phy definitions to fsl_usb.h
fsl_usb.h file created to share data bewteen usb platform code
and usb ip driver. Internal phy structure definitions moved to
this file
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 2ed384e..3a10d77 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2846,54 +2846,6 @@ typedef struct ccsr_pme { u8 res4[0x400]; } ccsr_pme_t; -#ifdef CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE -struct ccsr_usb_port_ctrl { - u32 ctrl; - u32 drvvbuscfg; - u32 pwrfltcfg; - u32 sts; - u8 res_14[0xc]; - u32 bistcfg; - u32 biststs; - u32 abistcfg; - u32 abiststs; - u8 res_30[0x10]; - u32 xcvrprg; - u32 anaprg; - u32 anadrv; - u32 anasts; -}; - -typedef struct ccsr_usb_phy { - u32 id; - struct ccsr_usb_port_ctrl port1; - u8 res_50[0xc]; - u32 tvr; - u32 pllprg[4]; - u8 res_70[0x4]; - u32 anaccfg; - u32 dbg; - u8 res_7c[0x4]; - struct ccsr_usb_port_ctrl port2; - u8 res_dc[0x334]; -} ccsr_usb_phy_t; - -#define CONFIG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0) -#define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1) -#define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1) -#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0) -#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1) -#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16) -#define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21) -#else -typedef struct ccsr_usb_phy { - u8 res0[0x18]; - u32 usb_enable_override; - u8 res[0xe4]; -} ccsr_usb_phy_t; -#define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 1 -#endif - #ifdef CONFIG_SYS_FSL_RAID_ENGINE struct ccsr_raide { u8 res0[0x543]; |