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author | Timur Tabi <timur@freescale.com> | 2011-04-18 17:16:00 -0500 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-28 22:09:23 -0500 |
commit | d90fdba6ca0b08c77cced6e914609e3696dd5909 (patch) | |
tree | 6065ad540c9aeb234869d430e9b2d0ba7a4d9a1e /arch/powerpc/include | |
parent | f68d3063491442ca5d871d3019a9d3f195873ed7 (diff) | |
download | u-boot-imx-d90fdba6ca0b08c77cced6e914609e3696dd5909.zip u-boot-imx-d90fdba6ca0b08c77cced6e914609e3696dd5909.tar.gz u-boot-imx-d90fdba6ca0b08c77cced6e914609e3696dd5909.tar.bz2 |
powerpc/85xx: Implement work-around for P4080 erratum SERDES-A001
Bank powerdown through RCW[SRDS_LPD_Bn] for XAUI on FM2 and SGMII on FM1
are swapped.
Erratum SERDES-A001 says that if bank two is kept disabled and after bank
three is enabled, then the PLL for bank three won't lock properly. The
work-around is to enable and then disable bank two after bank three is
enabled.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index b8b8914..ccf703b 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -311,6 +311,7 @@ #define CONFIG_SYS_P4080_ERRATUM_CPU22 #define CONFIG_SYS_P4080_ERRATUM_SERDES8 #define CONFIG_SYS_P4080_ERRATUM_SERDES9 +#define CONFIG_SYS_P4080_ERRATUM_SERDES_A001 #define CONFIG_SYS_P4080_ERRATUM_SERDES_A005 /* P5010 is single core version of P5020 */ |