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authorTimur Tabi <timur@freescale.com>2012-11-01 08:20:23 +0000
committerAndy Fleming <afleming@freescale.com>2012-11-27 18:28:07 -0600
commitd607b9684b188d020a00e9cfaa502b782f29d538 (patch)
tree38250de067cd259ea9d11bfbff0fe3d44f964ae5 /arch/powerpc/include
parent345d6efdc713334387bf07cd0c122b3b03d401b2 (diff)
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powerpc/85xx: implement check for erratum A-004580 work-around
The work-around for erratum A-004580 ("Internal tracking loop can falsely lock causing unrecoverable bit errors") is implemented via the PBI (pre-boot initialization code, typically attached to the RCW binary). This is because the work-around is easier to implement in PBI than in U-Boot itself. It is still useful, however, for the 'errata' command to tell us whether the work-around has been applied. For A-004580, we can do this by verifying that the values in the specific registers that the work-around says to update. This change requires access to the SerDes lane sub-structure in serdes_corenet_t, so we make it a named struct. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/config_mpc85xx.h1
-rw-r--r--arch/powerpc/include/asm/immap_85xx.h2
2 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index d1c1e06..1ccc5c5 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -426,6 +426,7 @@
#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000
#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
#define CONFIG_SYS_FSL_ERRATUM_A004849
+#define CONFIG_SYS_FSL_ERRATUM_A004580
#elif defined(CONFIG_PPC_P5020) /* also supports P5010 */
#define CONFIG_SYS_PPC64 /* 64-bit core */
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 54aa71b..b61f592 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2619,7 +2619,7 @@ typedef struct serdes_corenet {
#define SRDS_PCCR2_RST_XGMII1 0x00800000
#define SRDS_PCCR2_RST_XGMII2 0x00400000
u32 res5[197];
- struct {
+ struct serdes_lane {
u32 gcr0; /* General Control Register 0 */
#define SRDS_GCR0_RRST 0x00400000
#define SRDS_GCR0_1STLANE 0x00010000