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authorRuchika Gupta <ruchika.gupta@freescale.com>2014-09-09 11:50:31 +0530
committerYork Sun <yorksun@freescale.com>2014-10-16 14:16:50 -0700
commit028dbb8db1d18c5835ab34659f9ef7a516571524 (patch)
treeb6c94157e8a8483a025b2ec4591df115422fe3ae /arch/powerpc/include
parent48ef0d2a1002d3da0bf7ed13d0959bcbf782c792 (diff)
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fsl_sec : Change accessor function to take care of endianness
SEC registers can be of type Little Endian or big Endian depending upon Freescale SoC. Here SoC defines the register type of SEC IP. So update acessor functions with common SEC acessor functions to take care both type of endianness. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/config_mpc85xx.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 712f2ef..4c1774f 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -24,6 +24,7 @@
/* IP endianness */
#define CONFIG_SYS_FSL_IFC_BE
+#define CONFIG_SYS_FSL_SEC_BE
/* Number of TLB CAM entries we have on FSL Book-E chips */
#if defined(CONFIG_E500MC)