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| author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2013-07-31 16:56:41 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-08-14 10:57:49 -0700 |
| commit | a4c955bc3b23a38dc2c5c60b655a4d01eff93cec (patch) | |
| tree | c9e16650876d0e19ca66649e01d9e090cfc376bd /arch/powerpc/include | |
| parent | b98d934128bcd98106e764d2f492ac79c38ae53d (diff) | |
| download | u-boot-imx-a4c955bc3b23a38dc2c5c60b655a4d01eff93cec.zip u-boot-imx-a4c955bc3b23a38dc2c5c60b655a4d01eff93cec.tar.gz u-boot-imx-a4c955bc3b23a38dc2c5c60b655a4d01eff93cec.tar.bz2 | |
powerpc/mpc85xx:Avoid hardcoded init for serdes block 1 & 2
It is not necessary for all processor to have serdes block 1 & 2.
They may have only one serdes block.
So, put serdes block 1 & 2 related code under defines
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/include')
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index ce1bf05..e1fc0f7 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -535,6 +535,8 @@ #endif #define CONFIG_SYS_FSL_NUM_CC_PLLS 5 #define CONFIG_SYS_FSL_NUM_LAWS 32 +#define CONFIG_SYS_FSL_SRDS_1 +#define CONFIG_SYS_FSL_SRDS_2 #define CONFIG_SYS_FSL_SRDS_3 #define CONFIG_SYS_FSL_SRDS_4 #define CONFIG_SYS_FSL_SEC_COMPAT 4 @@ -565,6 +567,8 @@ #define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */ #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ #define CONFIG_SYS_FSL_NUM_LAWS 32 +#define CONFIG_SYS_FSL_SRDS_1 +#define CONFIG_SYS_FSL_SRDS_2 #define CONFIG_SYS_FSL_SEC_COMPAT 4 #define CONFIG_SYS_NUM_FMAN 1 #define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7 |