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| author | Laurentiu TUDOR <Laurentiu.Tudor@freescale.com> | 2013-10-23 15:20:27 +0300 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-11-13 12:41:28 -0800 |
| commit | 8f9fe660fcf99af47dc0a28b80cd4e34d403f7c5 (patch) | |
| tree | 3abbb2bb9b98ecb2a7ac250f32fa9b5802a5b0d7 /arch/powerpc/include/asm | |
| parent | b4125a235e2c4a490765292a95b47008036a4e0d (diff) | |
| download | u-boot-imx-8f9fe660fcf99af47dc0a28b80cd4e34d403f7c5.zip u-boot-imx-8f9fe660fcf99af47dc0a28b80cd4e34d403f7c5.tar.gz u-boot-imx-8f9fe660fcf99af47dc0a28b80cd4e34d403f7c5.tar.bz2 | |
powerpc/t4240: fix per pci endpoint liodn offsets
Update the code that builds the pci endpoint liodn
offset list so that it doesn't overlap with other
liodns and doesn't generate negative offsets like:
fsl,liodn-offset-list = <0 0xffffffcd 0xffffffcf
0xffffffd1 0xffffffd3
0xffffffd5 0xffffffd7
0xffffffd9 0xffffffdb>;
The update consists in adding a parameter to the
function that builds the list to specify the base
liodn.
On PCI v2.4 use the old base = 256 and, on PCI 3.0
where some of the PCIE liodns are larger than 256,
use a base = 1024. The version check is based on
the PCI controller's version register.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm')
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 3e76c54..6312618 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -282,7 +282,9 @@ typedef struct ccsr_pcix { u32 int_ack; /* PCIX IRQ Acknowledge */ u8 res000c[52]; u32 liodn_base; /* PCIX LIODN base register */ - u8 res0044[3004]; + u8 res0044[2996]; + u32 ipver1; /* PCIX IP block revision register 1 */ + u32 ipver2; /* PCIX IP block revision register 2 */ u32 potar0; /* PCIX Outbound Transaction Addr 0 */ u32 potear0; /* PCIX Outbound Translation Extended Addr 0 */ u32 powbar0; /* PCIX Outbound Window Base Addr 0 */ |