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| author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2014-01-18 12:28:30 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-02-03 08:38:51 -0800 |
| commit | 1b4175d6fa12b8012c119889ad5cc1e65c3cf6ba (patch) | |
| tree | d5aa577b493fc7e44de173445bcda11f29721f38 /arch/powerpc/include/asm | |
| parent | 27c78e06f2b42bd6285ed104ece23f6c69e42e6f (diff) | |
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driver/ifc:Change accessor function to take care of endianness
IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.
So update acessor functions with common IFC acessor functions to take care
both type of endianness.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm')
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 32e19be..56587ae 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -22,6 +22,9 @@ #define FSL_DDR_VER_4_7 47 #define FSL_DDR_VER_5_0 50 +/* IP endianness */ +#define CONFIG_SYS_FSL_IFC_BE + /* Number of TLB CAM entries we have on FSL Book-E chips */ #if defined(CONFIG_E500MC) #define CONFIG_SYS_NUM_TLBCAMS 64 |