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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-05-11 00:06:03 +0200 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-05-11 00:06:03 +0200 |
| commit | e825b100d209a9d3c79b2998452cafa94eec986a (patch) | |
| tree | e1654c4d745839eba8d37f67d15acde79382e23e /arch/powerpc/include/asm | |
| parent | b03b25caea1ff3a501161f5bc1ad5e5b5b124e0c (diff) | |
| parent | 66a62ce0dc48d2319938c72f34a562f519c5d5c2 (diff) | |
| download | u-boot-imx-e825b100d209a9d3c79b2998452cafa94eec986a.zip u-boot-imx-e825b100d209a9d3c79b2998452cafa94eec986a.tar.gz u-boot-imx-e825b100d209a9d3c79b2998452cafa94eec986a.tar.bz2 | |
Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'
Diffstat (limited to 'arch/powerpc/include/asm')
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 12 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/fsl_memac.h | 4 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 12 |
3 files changed, 24 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index d57c178..7267611 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -333,7 +333,9 @@ #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 +#define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 +#define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 @@ -365,7 +367,9 @@ #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 +#define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_CPU_A003999 +#define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 @@ -442,6 +446,8 @@ #define CONFIG_SYS_FSL_USB2_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 +#define CONFIG_SYS_FSL_ERRATUM_USB14 +#define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER #define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2 @@ -473,7 +479,7 @@ #define CONFIG_SYS_FSL_USB2_PHY_ENABLE #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 -#define CONFIG_SYS_FSL_ERRATUM_USB138 +#define CONFIG_SYS_FSL_ERRATUM_USB14 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003474 #define CONFIG_SYS_FSL_ERRATUM_A004699 @@ -490,7 +496,6 @@ #define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_NAND_FSL_IFC -#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #elif defined(CONFIG_BSC9132) @@ -503,7 +508,6 @@ #define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 #define CONFIG_NAND_FSL_IFC -#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2" @@ -560,6 +564,7 @@ #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4" #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A_004934 +#define CONFIG_SYS_FSL_ERRATUM_A005871 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #elif defined(CONFIG_PPC_B4860) @@ -585,6 +590,7 @@ #define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE #define CONFIG_SYS_FSL_ERRATUM_A_004934 +#define CONFIG_SYS_FSL_ERRATUM_A005871 #define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000 #else diff --git a/arch/powerpc/include/asm/fsl_memac.h b/arch/powerpc/include/asm/fsl_memac.h index d6b60e6..69f95d1 100644 --- a/arch/powerpc/include/asm/fsl_memac.h +++ b/arch/powerpc/include/asm/fsl_memac.h @@ -222,6 +222,10 @@ struct memac { /* IF_MODE - Interface Mode Register */ #define IF_MODE_EN_AUTO 0x00008000 /* 1 - Enable automatic speed selection */ +#define IF_MODE_SETSP_100M 0x00000000 /* 00 - 100Mbps RGMII */ +#define IF_MODE_SETSP_10M 0x00002000 /* 01 - 10Mbps RGMII */ +#define IF_MODE_SETSP_1000M 0x00004000 /* 10 - 1000Mbps RGMII */ +#define IF_MODE_SETSP_MASK 0x00006000 /* setsp mask bits */ #define IF_MODE_XGMII 0x00000000 /* 00- XGMII(10) interface mode */ #define IF_MODE_GMII 0x00000002 /* 10- GMII interface mode */ #define IF_MODE_MASK 0x00000003 /* mask for mode interface mode */ diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 4eb3f79..baaa9fe 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2914,7 +2914,8 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_IFC_OFFSET 0x124000 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0x130000 #define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET 0x1e0000 -#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2 +#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_PPC_B4860)\ + && !defined(CONFIG_PPC_B4420) #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0x240000 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET 0x250000 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x260000 @@ -3160,4 +3161,13 @@ struct ccsr_cluster_l2 { #define CONFIG_SYS_FSL_CLUSTER_1_L2 \ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CLUSTER_1_L2_OFFSET) #endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */ + +#define CONFIG_SYS_DCSR_DCFG_OFFSET 0X20000 +struct dcsr_dcfg_regs { + u8 res_0[0x520]; + u32 ecccr1; +#define DCSR_DCFG_ECC_DISABLE_USB1 0x00008000 +#define DCSR_DCFG_ECC_DISABLE_USB2 0x00004000 + u8 res_524[0x1000 - 0x524]; /* 0x524 - 0x1000 */ +}; #endif /*__IMMAP_85xx__*/ |