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| author | York Sun <yorksun@freescale.com> | 2013-03-25 07:40:07 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-05-24 16:54:11 -0500 |
| commit | f69814397e7efaf0b2bfa3c83425c906ce6b50f4 (patch) | |
| tree | 3526ce4f78bb8d70ad0e0b80df23002a5ee5fb07 /arch/powerpc/include/asm/processor.h | |
| parent | 5f208d118a8590843aaca723d304b35f2729c141 (diff) | |
| download | u-boot-imx-f69814397e7efaf0b2bfa3c83425c906ce6b50f4.zip u-boot-imx-f69814397e7efaf0b2bfa3c83425c906ce6b50f4.tar.gz u-boot-imx-f69814397e7efaf0b2bfa3c83425c906ce6b50f4.tar.bz2 | |
powerpc/chassis2: Change core numbering scheme
To align with chassis generation 2 spec, all cores are numbered in sequence.
The cores may reside across multiple clusters. Each cluster has zero to four
cores. The first available core is numbered as core 0. The second available
core is numbered as core 1 and so on.
Core clocks are generated by each clusters. To identify the cluster of each
core, topology registers are examined.
Cluster clock registers are reorganized to be easily indexed.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/processor.h')
| -rw-r--r-- | arch/powerpc/include/asm/processor.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 5799386..56b22d8 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -1200,6 +1200,8 @@ struct cpu_type { struct cpu_type *identify_cpu(u32 ver); int fixup_cpu(void); +int fsl_qoriq_core_to_cluster(unsigned int core); + #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) #define CPU_TYPE_ENTRY(n, v, nc) \ { .name = #n, .soc_ver = SVR_##v, .num_cores = (nc), \ |