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| author | Andy Fleming <afleming@freescale.com> | 2012-10-08 07:44:18 +0000 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2012-10-22 14:31:22 -0500 |
| commit | f311838ded0c4b08726e5a363d518babc2109493 (patch) | |
| tree | 0b7489566b452a306808ab7f1a13a7224228d507 /arch/powerpc/include/asm/fsl_portals.h | |
| parent | aa42cb71fa28a4f2c8b8cc0e691151f4ba19dbd9 (diff) | |
| download | u-boot-imx-f311838ded0c4b08726e5a363d518babc2109493.zip u-boot-imx-f311838ded0c4b08726e5a363d518babc2109493.tar.gz u-boot-imx-f311838ded0c4b08726e5a363d518babc2109493.tar.bz2 | |
powerpc/mpc85xx: Add T4 device definitions
The T4 has added devices to previous corenet implementations:
* SEC has 3 more DECO units
* New PMAN device
* New DCE device
This doesn't add full support for the new devices. Just some
preliminary support.
Move PMAN LIODN to upper half of register
Despite having only one LIODN, the PMAN LIODN is stored in the
upper half of the register. Re-use the 2-LIODN code and just
set the LIODN as if the second one is 0. This results in the
actual LIODN being written to the upper half of the register.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/fsl_portals.h')
| -rw-r--r-- | arch/powerpc/include/asm/fsl_portals.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_portals.h b/arch/powerpc/include/asm/fsl_portals.h index 9a764d2..b75f5b9 100644 --- a/arch/powerpc/include/asm/fsl_portals.h +++ b/arch/powerpc/include/asm/fsl_portals.h @@ -39,6 +39,9 @@ enum fsl_dpaa_dev { #ifdef CONFIG_SYS_DPAA_RMAN FSL_HW_PORTAL_RMAN, #endif +#ifdef CONFIG_SYS_DPAA_DCE + FSL_HW_PORTAL_DCE, +#endif }; |