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| author | Kumar Gala <galak@kernel.crashing.org> | 2010-12-15 14:21:41 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-01-14 01:32:19 -0600 |
| commit | a4aafcc990c12816cfd4644e5c003d8556b6236b (patch) | |
| tree | 3b707b93bce69d27da88dfd89bd5887494b807ce /arch/powerpc/include/asm/fsl_pci.h | |
| parent | 3a0e3c27a50e395a59497e8bd60a00404e662eb1 (diff) | |
| download | u-boot-imx-a4aafcc990c12816cfd4644e5c003d8556b6236b.zip u-boot-imx-a4aafcc990c12816cfd4644e5c003d8556b6236b.tar.gz u-boot-imx-a4aafcc990c12816cfd4644e5c003d8556b6236b.tar.bz2 | |
powerpc/fsl-pci: Add generic code to setup PCIe controllers
Since all the PCIe controllers are connected over SERDES on the SoCs we
can utilize is_serdes_configured() to determine if a controller is
enabled. After which we can setup the ATMUs and LAWs for the controller
in a common fashion and allow board code to specify what the controller
is connected to for reporting reasons.
We also provide a per controller (rather than all) for some systems that
may have special requirements.
Finally, we refactor the code used by the P1022DS to utilize the new
generic code.
Based on patch by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/fsl_pci.h')
| -rw-r--r-- | arch/powerpc/include/asm/fsl_pci.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h index 5cbe139..15ab50d 100644 --- a/arch/powerpc/include/asm/fsl_pci.h +++ b/arch/powerpc/include/asm/fsl_pci.h @@ -22,6 +22,8 @@ #define __FSL_PCI_H_ #include <asm/fsl_law.h> +#include <asm/fsl_serdes.h> +#include <pci.h> int fsl_setup_hose(struct pci_controller *hose, unsigned long addr); int fsl_is_pci_agent(struct pci_controller *hose); @@ -172,6 +174,9 @@ struct fsl_pci_info { int fsl_pci_init_port(struct fsl_pci_info *pci_info, struct pci_controller *hose, int busno); +int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev, + struct fsl_pci_info *pci_info); +int fsl_pcie_init_board(int busno); #define SET_STD_PCI_INFO(x, num) \ { \ @@ -220,6 +225,7 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info, FT_FSL_PCIE2_SETUP; \ FT_FSL_PCIE3_SETUP; \ FT_FSL_PCIE4_SETUP; +#define FT_FSL_PCIE_SETUP FT_FSL_PCI_SETUP #elif defined(CONFIG_MPC85xx) #define FSL_PCI_COMPAT "fsl,mpc8540-pci" #define FSL_PCIE_COMPAT "fsl,mpc8548-pcie" @@ -229,6 +235,10 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info, FT_FSL_PCIE1_SETUP; \ FT_FSL_PCIE2_SETUP; \ FT_FSL_PCIE3_SETUP; +#define FT_FSL_PCIE_SETUP \ + FT_FSL_PCIE1_SETUP; \ + FT_FSL_PCIE2_SETUP; \ + FT_FSL_PCIE3_SETUP; #elif defined(CONFIG_MPC86xx) #define FSL_PCI_COMPAT "fsl,mpc8610-pci" #define FSL_PCIE_COMPAT "fsl,mpc8641-pcie" |