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authorYork Sun <yorksun@freescale.com>2011-01-25 22:05:49 -0800
committerKumar Gala <galak@kernel.crashing.org>2011-02-03 02:46:13 -0600
commit91671913f7db59dd876e86433d8f3462dbf66588 (patch)
treea0a4d7143d19f3373cad4b964cc0230edbe9c9b4 /arch/powerpc/include/asm/config_mpc85xx.h
parenteb0aff77c83f70a01dfe47d72b08467c157f7a8b (diff)
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powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134
Workaround for the following errata: DDR111 - MCKE signal may not function correctly at assertion of HRESET DDR134 - The automatic CAS-to-Preamble feature of the DDR controller can calibrate to incorrect values These two workarounds must be implemented together because they touch common registers. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/config_mpc85xx.h')
-rw-r--r--arch/powerpc/include/asm/config_mpc85xx.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index a1a3d6b..3a29d1c 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -78,6 +78,7 @@
#define CONFIG_SYS_FSL_NUM_LAWS 12
#define CONFIG_SYS_FSL_SEC_COMPAT 2
#define CONFIG_SYS_FSL_ERRATUM_DDR_115
+#define CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
#elif defined(CONFIG_P1010)
#define CONFIG_MAX_CPUS 1