summaryrefslogtreecommitdiff
path: root/arch/powerpc/cpu
diff options
context:
space:
mode:
authorTimur Tabi <timur@freescale.com>2011-10-13 15:33:20 -0500
committerKumar Gala <galak@kernel.crashing.org>2011-10-13 23:38:10 -0500
commit7f92c3a27553e63ffb0efcff40573fb23a3e29ce (patch)
treea5a5a586c84eadd507223f3fcc74efb29cb96054 /arch/powerpc/cpu
parentb76aef60df7de9b2123c1a6981fc9b98e6a8c411 (diff)
downloadu-boot-imx-7f92c3a27553e63ffb0efcff40573fb23a3e29ce.zip
u-boot-imx-7f92c3a27553e63ffb0efcff40573fb23a3e29ce.tar.gz
u-boot-imx-7f92c3a27553e63ffb0efcff40573fb23a3e29ce.tar.bz2
powerpc/p3060: remove all references to RCW bits EC1_EXT, EC2_EXT, and EC3
The EC1_EXT, EC2_EXT, and EC3 bits in the RCW don't officially exist on the P3060 and should always be set to zero. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu')
-rw-r--r--arch/powerpc/cpu/mpc85xx/p3060_serdes.c20
1 files changed, 0 insertions, 20 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/p3060_serdes.c b/arch/powerpc/cpu/mpc85xx/p3060_serdes.c
index 6387276..e720dcf 100644
--- a/arch/powerpc/cpu/mpc85xx/p3060_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p3060_serdes.c
@@ -83,8 +83,6 @@ void soc_serdes_init(void)
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u32 devdisr2 = in_be32(&gur->devdisr2);
u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
- u32 rcwsr13 = in_be32(&gur->rcwsr[13]);
- u32 ec1_ext, ec2_ext;
/* NOTE: Leave FM1-1,FM1-2 alone for MDIO access */
@@ -116,23 +114,5 @@ void soc_serdes_init(void)
devdisr2 &= ~FSL_CORENET_DEVDISR2_DTSEC2_1;
}
- ec1_ext = rcwsr13 & FSL_CORENET_RCWSR13_EC1_EXT;
- if (ec1_ext) {
- if ((ec1_ext == FSL_CORENET_RCWSR13_EC1_EXT_FM1_DTSEC4_RGMII) ||
- (ec1_ext == FSL_CORENET_RCWSR13_EC1_EXT_FM1_DTSEC4_MII))
- devdisr2 &= ~FSL_CORENET_DEVDISR2_DTSEC1_4;
- }
-
- ec2_ext = rcwsr13 & FSL_CORENET_RCWSR13_EC2_EXT;
- if (ec2_ext) {
- if ((ec2_ext == FSL_CORENET_RCWSR13_EC2_EXT_FM2_DTSEC4_RGMII) ||
- (ec2_ext == FSL_CORENET_RCWSR13_EC2_EXT_FM2_DTSEC4_MII))
- devdisr2 &= ~FSL_CORENET_DEVDISR2_DTSEC2_4;
- }
-
- if ((rcwsr13 & FSL_CORENET_RCWSR13_EC3) ==
- FSL_CORENET_RCWSR13_EC3_FM2_DTSEC4_MII)
- devdisr2 &= ~FSL_CORENET_DEVDISR2_DTSEC2_4;
-
out_be32(&gur->devdisr2, devdisr2);
}