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| author | Fabian Cenedese <Cenedese@indel.ch> | 2011-02-14 12:59:33 +0100 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-04-10 11:24:21 -0500 |
| commit | c1c087b753633305a0d656a7b4d65d788f4bfb68 (patch) | |
| tree | be646c769c8480b4fb781448795e2c93ce684ce2 /arch/powerpc/cpu | |
| parent | 32c8cfb23cd8beb814edd217c02e6aa5c7a64acf (diff) | |
| download | u-boot-imx-c1c087b753633305a0d656a7b4d65d788f4bfb68.zip u-boot-imx-c1c087b753633305a0d656a7b4d65d788f4bfb68.tar.gz u-boot-imx-c1c087b753633305a0d656a7b4d65d788f4bfb68.tar.bz2 | |
powerpc/85xx: Removed clearing of L2-as-SRAM
Removed clearing of L2 cache as SRAM as it is not necessary without ECC.
This also speeds up the booting process.
Signed-off-by: Fabian Cenedese <cenedese@indel.ch>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init_nand.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c index 920bb47..796d398 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c @@ -42,8 +42,6 @@ void cpu_init_f(void) #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR) ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR; - char *l2srbar; - int i; out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR); @@ -54,10 +52,5 @@ void cpu_init_f(void) /* set L2E=1 & L2SRAM=001 */ out_be32(&l2cache->l2ctl, (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE)); - - /* Initialize L2 SRAM to zero */ - l2srbar = (char *)CONFIG_SYS_INIT_L2_ADDR; - for (i = 0; i < CONFIG_SYS_L2_SIZE; i++) - l2srbar[i] = 0; #endif } |