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author | Kumar Gala <galak@kernel.crashing.org> | 2010-05-22 13:21:39 -0500 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2010-07-21 00:40:16 -0500 |
commit | af0250652a775799da656f74719bdefb45fda7d5 (patch) | |
tree | 337b48483a5983e2cfef667ae5063f6da1f165e0 /arch/powerpc/cpu | |
parent | c26de2d8b15c15fdc0a33758fa7714667eec404c (diff) | |
download | u-boot-imx-af0250652a775799da656f74719bdefb45fda7d5.zip u-boot-imx-af0250652a775799da656f74719bdefb45fda7d5.tar.gz u-boot-imx-af0250652a775799da656f74719bdefb45fda7d5.tar.bz2 |
powerpc/85xx: Rework MPC8536 SERDES is_serdes_configured support
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/cpu')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 12 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c | 66 |
2 files changed, 38 insertions, 40 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index d491e2a..5d5b4c2 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -39,10 +39,6 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_MPC8536 -extern void fsl_serdes_init(void); -#endif - #ifdef CONFIG_QE extern qe_iop_conf_t qe_iop_conf_tab[]; extern void qe_config_iopin(u8 port, u8 pin, int dir, @@ -185,9 +181,6 @@ void cpu_init_f (void) /* Config QE ioports */ config_qe_ioports(); #endif -#if defined(CONFIG_MPC8536) - fsl_serdes_init(); -#endif #if defined(CONFIG_FSL_DMA) dma_init(); #endif @@ -332,6 +325,11 @@ int cpu_init_r(void) qe_reset(); #endif +#if defined(CONFIG_SYS_HAS_SERDES) + /* needs to be in ram since code uses global static vars */ + fsl_serdes_init(); +#endif + #if defined(CONFIG_MP) setup_mp(); #endif diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c index 7e72f5f..6dadeb8 100644 --- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c @@ -66,10 +66,11 @@ #define FSL_SRDSCR3_LANEE_SGMII 0x00000000 #define FSL_SRDSCR3_LANEE_SATA 0x00150005 - #define SRDS1_MAX_LANES 8 #define SRDS2_MAX_LANES 2 +static u32 serdes1_prtcl_map, serdes2_prtcl_map; + static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE}, [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1}, @@ -86,39 +87,12 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { int is_serdes_configured(enum srds_prtcl device) { - int i; - ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - u32 pordevsr = in_be32(&gur->pordevsr); - u32 srds1_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> - MPC85xx_PORDEVSR_IO_SEL_SHIFT; + int ret = (1 << device) & serdes1_prtcl_map; - u32 srds2_cfg = (pordevsr & MPC85xx_PORDEVSR_SRDS2_IO_SEL) >> - GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT; - - debug("%s: dev = %d\n", __FUNCTION__, device); - debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg); - debug("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_cfg); - - if (srds1_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { - printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg); - return 0; - } - - if (srds2_cfg > ARRAY_SIZE(serdes2_cfg_tbl)) { - printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_cfg); - return 0; - } - - for (i = 0; i < SRDS1_MAX_LANES; i++) { - if (serdes1_cfg_tbl[srds1_cfg][i] == device) - return 1; - } - for (i = 0; i < SRDS2_MAX_LANES; i++) { - if (serdes2_cfg_tbl[srds2_cfg][i] == device) - return 1; - } + if (ret) + return ret; - return 0; + return (1 << device) & serdes2_prtcl_map; } void fsl_serdes_init(void) @@ -126,13 +100,20 @@ void fsl_serdes_init(void) void *guts = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); void *sd = (void *)CONFIG_SYS_MPC85xx_SERDES2_ADDR; u32 pordevsr = in_be32(guts + GUTS_PORDEVSR_OFFS); - u32 srds2_io_sel; + u32 srds1_io_sel, srds2_io_sel; u32 tmp; + int lane; + + srds1_io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> + MPC85xx_PORDEVSR_IO_SEL_SHIFT; /* parse the SRDS2_IO_SEL of PORDEVSR */ srds2_io_sel = (pordevsr & GUTS_PORDEVSR_SERDES2_IO_SEL) >> GUTS_PORDEVSR_SERDES2_IO_SEL_SHIFT; + debug("PORDEVSR[SRDS1_IO_SEL] = %x\n", srds1_io_sel); + debug("PORDEVSR[SRDS2_IO_SEL] = %x\n", srds2_io_sel); + switch (srds2_io_sel) { case 1: /* Lane A - SATA1, Lane E - SATA2 */ /* CR 0 */ @@ -246,4 +227,23 @@ void fsl_serdes_init(void) default: break; } + + if (srds1_io_sel > ARRAY_SIZE(serdes1_cfg_tbl)) { + printf("Invalid PORDEVSR[SRDS1_IO_SEL] = %d\n", srds1_io_sel); + return; + } + for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { + enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_io_sel][lane]; + serdes1_prtcl_map |= (1 << lane_prtcl); + } + + if (srds2_io_sel > ARRAY_SIZE(serdes2_cfg_tbl)) { + printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_io_sel); + return; + } + + for (lane = 0; lane < SRDS2_MAX_LANES; lane++) { + enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds2_io_sel][lane]; + serdes2_prtcl_map |= (1 << lane_prtcl); + } } |