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author | Wolfgang Denk <wd@denx.de> | 2010-10-07 21:51:12 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2010-10-18 22:07:10 +0200 |
commit | 14d0a02a168b36e87665b8d7f42fa3e88263d26d (patch) | |
tree | 576843229c10eb3e8836dc40a12d3f6f0c26a3ce /arch/powerpc/cpu | |
parent | d24f2d321d8e78e990d100000d8efc4845c78b1c (diff) | |
download | u-boot-imx-14d0a02a168b36e87665b8d7f42fa3e88263d26d.zip u-boot-imx-14d0a02a168b36e87665b8d7f42fa3e88263d26d.tar.gz u-boot-imx-14d0a02a168b36e87665b8d7f42fa3e88263d26d.tar.bz2 |
Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.
Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'arch/powerpc/cpu')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/start.S | 18 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc86xx/start.S | 4 |
2 files changed, 11 insertions, 11 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 91096ad..c9df751 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -145,7 +145,7 @@ _start_e500: beq 2b /* Setup interrupt vectors */ - lis r1,TEXT_BASE@h + lis r1,CONFIG_SYS_TEXT_BASE@h mtspr IVPR,r1 li r1,0x0100 @@ -291,25 +291,25 @@ _start_e500: lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@h ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_4M)@l - lis r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@h - ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@l + lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@h + ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE & 0xffc00000, (MAS2_I|MAS2_G))@l /* The 85xx has the default boot window 0xff800000 - 0xffffffff */ lis r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h ori r9,r9,FSL_BOOKE_MAS3(0xffc00000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l #else /* - * create a temp mapping in AS=1 to the 1M TEXT_BASE space, the main - * image has been relocated to TEXT_BASE on the second stage. + * create a temp mapping in AS=1 to the 1M CONFIG_SYS_TEXT_BASE space, the main + * image has been relocated to CONFIG_SYS_TEXT_BASE on the second stage. */ lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_1M)@h ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_1M)@l - lis r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@h - ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@l + lis r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, (MAS2_I|MAS2_G))@h + ori r8,r8,FSL_BOOKE_MAS2(CONFIG_SYS_TEXT_BASE, (MAS2_I|MAS2_G))@l - lis r9,FSL_BOOKE_MAS3(TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h - ori r9,r9,FSL_BOOKE_MAS3(TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l + lis r9,FSL_BOOKE_MAS3(CONFIG_SYS_TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h + ori r9,r9,FSL_BOOKE_MAS3(CONFIG_SYS_TEXT_BASE, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l #endif mtspr MAS0,r6 diff --git a/arch/powerpc/cpu/mpc86xx/start.S b/arch/powerpc/cpu/mpc86xx/start.S index 596053f..0d02279 100644 --- a/arch/powerpc/cpu/mpc86xx/start.S +++ b/arch/powerpc/cpu/mpc86xx/start.S @@ -848,8 +848,8 @@ setup_ccsrbar: stw r5, 0(r4) /* Store physical value of CCSR */ isync - lis r5, TEXT_BASE@h - ori r5,r5,TEXT_BASE@l + lis r5, CONFIG_SYS_TEXT_BASE@h + ori r5,r5,CONFIG_SYS_TEXT_BASE@l lwz r5, 0(r5) isync |